参数资料
型号: 74ALS175D
厂商: NXP SEMICONDUCTORS
元件分类: 通用总线功能
英文描述: Quad D flip-flop
中文描述: ALS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封装: PLASTIC, SO-16
文件页数: 5/8页
文件大小: 99K
代理商: 74ALS175D
Philips Semiconductors
Product specification
74ALS175
Quad D flip-flop
1991 Feb 08
5
AC WAVEFORMS
For all waveforms, V
M
= 1.3V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
CP
V
M
V
M
V
M
t
w
(H)
1/f
max
V
M
V
M
t
PLH
t
w
(L)
t
PHL
Q
n
V
M
V
M
Q
n
t
PLH
t
PHL
SF00722
Waveform 1.
Propagation Delay for Clock Input to Output,
Clock Pulse Width,
and Maximum Clock Frequency
CP
V
M
V
M
V
M
V
M
t
PHL
t
REC
MR
Q
n
t
w
(L)
V
M
Q
n
t
PLH
SF00723
Waveform 2.
Master Reset to Output Delay,
and Master Reset to Clock Recovery Time
Master Reset Pulse Width,
t
h
(H)
t
su
(H)
CP
SC00064
V
M
V
M
V
M
V
M
V
M
V
M
t
h
(L)
t
su
(L)
Dn
Waveform 3.
Data Setup and Hold Times
TEST CIRCUIT AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0.3V
0.3V
t
THL (
t
f
f
)
INPUT PULSE REQUIREMENTS
Rep.Rate
t
w
t
TLH
2.0ns
t
THL
2.0ns
1MHz
500ns
Input Pulse Definition
V
CC
Family
74ALS
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-pole Outputs
DEFINITIONS:
R
L
=
Load resistor;
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
C
L
=
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
Amplitude
3.5V
1.3V
V
M
SC00005
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