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参数资料
| 型号： | 74ALVC16835DGGRG4 |
| 厂商： | Texas Instruments |
| 文件页数： | 1/16页 |
| 文件大小： | 0K |
| 描述： | IC UNIV BUS DVR 18BIT 56TSSOP |
| 标准包装： | 2,000 |
| 系列： | 74ALVC |
| 逻辑类型： | 通用总线驱动器 |
| 电路数： | 18 位 |
| 输出电流高，低： | 24mA，24mA |
| 电源电压： | 1.65 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 56-TSSOP |
| 包装： | 带卷 (TR) |
www.ti.com
FEATURES
DESCRIPTION/ORDERING INFORMATION
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NC
Y1
GND
Y2
Y3
VCC
Y4
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
Y12
GND
Y13
Y14
Y15
VCC
Y16
Y17
GND
Y18
OE
LE
GND
NC
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
CLK
GND
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
NC No internal connection
SN74ALVC16835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004
Member of the Texas Instruments Widebus
Family
Operates From 1.65 V to 3.6 V
Max tpd of 2 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Ideal for Use in PC100 Register DIMM,
Revision 1.1
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This 18-bit universal bus driver is designed for 1.65-V
to 3.6-V VCC operation.
Data
flow
from
A
to
Y
is
controlled
by
the
output-enable (OE) input. The device operates in the
transparent mode when the latch-enable (LE) input is
high. The A data is latched if the clock (CLK) input is
held at a high or low logic level. If LE is low, the A
data is stored in the latch/flip-flop on the low-to-high
transition of CLK. When OE is high, the outputs are in
the high-impedance state.
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVC16835DL
SSOP - DL
ALVC16835
Tape and reel
SN74ALVC16835DLR
TSSOP - DGG
Tape and reel
SN74ALVC16835DGGR
ALVC16835
-40
°C to 85°C
TVSOP - DGV
Tape and reel
SN74ALVC16835DGVR
VC835
VFBGA - GQL
SN74ALVC16835GQLR
Tape and reel
VC835
VFBGA - ZQL (Pb-free)
SN74ALVC16835ZQLR
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1998–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74ALVC16835DGVRE4 | 功能描述:通用总线函数 18-Bit Univ Bus Drv With 3-State Outputs RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74ALVC16835DGVRG4 | 功能描述:通用总线函数 18B Universal Bus Dr RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74ALVC16835DLRG4 | 功能描述:总线收发器 18-Bit Univ Bus Drv With 3-State Outputs RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74ALVC16835MTD | 功能描述:总线收发器 18-Bit Universal Bus RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74ALVC16836A | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:20-bit registered driver with inverted register enable 3-State |
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