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参数资料
| 型号： | 74ALVCH16540 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-PDIP -40 to 85 |
| 中文描述： | 2.5V/3.3V的16位缓冲器/线路驱动器，反相，5V的输入电压容三态 |
| 文件页数： | 2/12页 |
| 文件大小： | 97K |
| 代理商： | 74ALVCH16540 |
Philips Semiconductors
Product specification
74ALVCH16540
16-bit buffer/line driver, inverting,
5V input tolerant (3-State)
2
1997 Aug 11
853-2020 18266
FEATURES
Wide supply voltage range of 1.2 V to 3.6 V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
MULTIBYTE
TM
flow-through standard pin-out architecture
Low inductance multiple V
CC
and ground pins for minimum noise
and ground bounce
Direct interface with TTL levels
Bus hold on all data inputs eliminates the need for external pull-up
resistors to hold unused inputs
Output drive capability 50
transmission lines @ 85
°
C
DESCRIPTION
The 74ALVCH16540 is a high-performance, low-power, low-voltage,
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
The 74ALVCH16540 is a 16-bit inverting buffer/line driver with
3-State outputs. The 3-State outputs are controlled by the output
enable inputs 1OE
n
and 2OE
n
. A HIGH on nOE
n
causes the outputs
to assume a high impedance OFF-state.
Active bus hold circuitry is provided to hold unused or floating data
inputs at a valid logic level. This feature eliminates the need for
external pull-up or pull-down resistors. The device can be used as
four 4-bit buffers, two 8-bit buffers or one 16-bit buffer.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
1OE
1
1Y0
1Y1
GND
1Y2
1Y3
V
CC
1Y5
GND
1Y6
1Y7
2Y0
2Y1
GND
1Y4
2Y2
2Y3
V
CC
2Y4
2Y5
2A5
2A4
V
CC
2A3
2A2
GND
2A1
2A0
1A7
1A6
GND
1A5
1A4
V
CC
1A3
1A2
GND
1A1
1A0
1OE
2
21
22
23
24
25
26
27
28
GND
2Y6
2Y7
2OE
1
2OE
2
2A7
2A6
GND
SW00108
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
PLH
/t
Propagation delay
1An to 1Yn;
2An to 2Yn
C
L
= 50pF
V
CC
= 3.3V
C
L
= 30pF
V
CC
= 2.5V
1.8
ns
1.8
ns
C
I
Input capacitance
5.0
pF
C
PD
Power dissipation capacitance per buffer
V = GND to V
CC1
Outputs enabled
26
pF
Outputs disabled
5
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
= C
×
V
CC2
×
f
+ (C
L
×
V
CC2
×
f
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
48-Pin Plastic SSOP Type III
–40
°
C to +85
°
C
74ALVCH16540 DL
ACH16540 DL
SOT370-1
48-Pin Plastic TSSOP Type II
–40
°
C to +85
°
C
74ALVCH16540 DGG
ACH16540 DGG
SOT362-1
相关PDF资料 |
PDF描述 |
|---|---|
| 74ALVCH16540DGG | Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-PDIP -40 to 85 |
| 74ALVCH16540DL | Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 |
| 74ALVCH16543 | Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SO -40 to 85 |
| 74ALVCH16600 | 18-bit universal bus transceiver 3-State |
| 74ALVCH16601 | Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 74ALVCH16540APA | 制造商:Integrated Device Technology Inc 功能描述: |
| 74ALVCH16540DGG | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:2.5V/3.3V 16-bit buffer/line driver, inverting, 5V input tolerant 3-State |
| 74ALVCH16540DGG,51 | 功能描述:缓冲器和线路驱动器 3.3V 16-BIT BUF/LINE DRVR INV RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| 74ALVCH16540DG-T | 功能描述:缓冲器和线路驱动器 3.3V 16-BIT BUF/LINE DRVR INV RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
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