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参数资料
| 型号： | 74ALVCH16623 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | 16-bit transceiver with dual enable; 3-state |
| 中文描述： | 16位双使收发器，三态 |
| 文件页数： | 2/16页 |
| 文件大小： | 84K |
| 代理商： | 74ALVCH16623 |
1999 Sep 20
2
Philips Semiconductors
Product specification
16-bit transceiver with dual enable; 3-state
74ALVCH16623
FEATURES
Complies with JEDEC standard
no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
MULTIBYTE
flow-through
standard pin-out architecture
All data inputs have bus hold
circuitry
Output drive capability 50
transmission lines at 85
°
C
Current drive
±
24 mA at 3.0 V.
DESCRIPTION
The 74ALVCH16623 is a high-performance, low-power, low-voltage, Si-gate
CMOS device, superior to most advanced CMOS compatible TTL families.
The 74ALVCH16623 is a 16-bit transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions.
This 16-bit bus transceiver is designed for asynchronous two-way
communication between data buses. The control function implementation
allows maximum flexibility in timing. This device allows data transmission from
the A bus to the B bus or from the B bus to the A bus, depending upon the logic
levels at the enable inputs (nOE
AB
, nOE
BA
). The enable inputs can be used to
disable the device so that the buses are effectively isolated. The dual enable
function configuration gives this transceiver the capability to store data by
simultaneous enabling of nOE
AB
and nOE
BA
. Each output reinforces its input in
this transceiver configuration. Thus, when all control inputs are enabled and all
other data sources to the four sets of the bus lines are at high-impedance
OFF-state, all sets of bus lines will remain at their last states. The 8-bit codes
appearing on the two double sets of buses will be complementary. This device
can be used as two 8-bit transceivers or one 16-bit transceiver.
To ensure the high-impedance state during power-on or power-down, OE
BA
shouldbetiedtoV
CC
throughapull-upresistor andOE
AB
shouldbetiedtoGND
through a pull-down resistor; the minimum value of the resistor is determined
by the current-sinking/current-sourcing capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a
valid logic level.
QUICK REFERENCE DATA
Ground = 0; T
amb
= 25
°
C; t
r
= t
f
= 2.5 ns.
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
C
L
= output load capacitance in pF;
f
o
= output frequency in MHz;
V
CC
= supply voltage in Volts;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
The condition is V
I
= GND to V
CC
.
2.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
propagation delay nA
n
, nB
n
to nB
n
, nA
n
C
L
= 30 pF; V
CC
= 2.5 V
C
L
= 50 pF; V
CC
= 3.3 V
2.0
1.9
10.0
3.0
ns
ns
pF
pF
C
I/O
C
I
C
PD
input/output capacitance
input capacitance
power dissipation capacitance per buffer notes 1 and 2
outputs enabled
outputs disabled
35
5
pF
pF
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74ALVCH16623DGG | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:16-bit transceiver with dual enable; 3-state |
| 74ALVCH16623DGG,51 | 功能描述:总线收发器 16-BIT XCVR NON-INVER, 3-S RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74ALVCH16623DL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Dual 8-bit Bus Transceiver |
| 74ALVCH16623DL,112 | 功能描述:IC 16BIT TXRX 3-ST 48SSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 缓冲器，驱动器，接收器，收发器 系列:74ALVCH 标准包装:1,000 系列:74ABT 逻辑类型:寄存收发器，非反相 元件数:1 每个元件的位元数:8 输出电流高，低:32mA，64mA 电源电压:4.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) |
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