参数资料
型号: 74ALVT16841
厂商: NXP Semiconductors N.V.
英文描述: 2.5V/3.3V ALVT 20-bit bus interface latch(3-State)(2.5V/3.3V ALVT 20位总线接口锁存器(三态))
中文描述: 2.5V/3.3V的ALVT 20位总线接口锁存器(3态)(2.5V/3.3V的ALVT 20位总线接口锁存器(三态))
文件页数: 6/14页
文件大小: 96K
代理商: 74ALVT16841
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
6
DC ELECTRICAL CHARACTERISTICS (3.3V
0.3V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°
C to +85
°
C
TYP
1
UNIT
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 3.0V; I
IK
= –18mA
–0.85
–1.2
V
CC
= 3 0 to 3 6V; I
OH
V
= 3.0 to 3.6V; I
= –100
μ
A
V
CC
= 3.0V; I
OH
= –32mA
V
CC
= 3.0V; I
OL
= 100
μ
A
V
CC
= 3.0V; I
OL
= 16mA
V
CC
= 3.0V; I
OL
= 32mA
V
CC
= 3.0V; I
OL
= 64mA
V
CC
= 3.6V; I
O
= 1mA; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 0 or 3.6V; V
I
= 5.5V
V
CC
= 3.6V; V
I
= V
CC
V
CC
= 3.6V; V
I
= 0V
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 3V; V
I
= 0.8V
V
CC
= 3V; V
I
= 2.0V
V
CC
= 0V to 3.6V; V
CC
= 3.6V
CC
–0 2
V
–0.2
2.0
CC
V
2.3
V
OH
High-level output voltage
High-level out ut voltage
V
0.07
0.25
0.3
0.4
0.2
0.4
0.5
0.55
V
OL
Low–level output voltage
Low–level out ut voltage
V
V
RST
Power-up output low voltage
6
0.55
±
1
10
1
-5
±
100
V
Control pins
0.1
0.1
0.5
0.1
0.1
130
–140
I
I
Input leakage current
In ut leakage current
μ
A
Data pins
Data ins
4
I
OFF
Off current
μ
A
Bus Hold current
Data inputs
7
75
–75
±
500
I
HOLD
μ
A
I
EX
Current into an output in the
High state when V
O
> V
CC
Power up/down 3-State output
current
3
V
O
= 5.5V; V
CC
= 3.0V
10
125
μ
A
I
PU/PD
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
OE/OE = Don’t care
1
±
100
μ
A
I
OZH
I
OZL
I
CCH
I
CCL
I
CCZ
3-State output High current
V
CC
= 3.6V; V
O
= 3.0V; V
I
= V
IL
or V
IH
V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O =
0
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
V
= 3V to 3.6V; One input at V
CC
–0.6V,
Other inputs at V
CC
or GND
0.5
5
μ
A
μ
A
3-State output Low current
0.5
–5
0.07
0.1
Quiescent supply current
3.2
7
mA
0.07
0.1
I
CC
Additional supply current per
input pin
2
0.04
0.4
mA
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
°
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
±
0.3V a
transition time of 100
μ
sec is permitted. This parameter is valid for T
amb
= 25
°
C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
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