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参数资料
| 型号： | 74ALVT16899 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 通用总线功能 |
| 英文描述： | 2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker (3-State)(带16位奇偶发生器/校验器的2.5V/3.3V 18位锁存收发器（三态）) |
| 中文描述： | ALVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封装： | PLASTIC, SSOP3-56 |
| 文件页数： | 2/20页 |
| 文件大小： | 122K |
| 代理商： | 74ALVT16899 |
Philips Semiconductors
Product specification
74ALVT16899
2.5V/3.3V 18-bit latched transceiver with
16-bit parity generator/checker (3-State)
2
1998 Jun 30
853-2090-19651
FEATURES
Symmetrical (A and B bus functions are identical)
Selectable generate parity or ”feed-through” parity for A-to-B and
B-to-A directions
Independent transparent latches for A-to-B and B-to-A directions
Selectable ODD/EVEN parity
Continuously checks parity of both A bus and B bus latches as
ERRA and ERRB
Open-collector ERR output
Ability to simultaneously generate and check parity
Can simultaneously read/latch A and B bus data
Output capability: +64 mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Power up 3-State
Power-up reset
No bus current loading when output is tied to 5 V bus
Live insertion/extraction permitted
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74ALVT16899 is a high-performance BiCMOS product
designed for V
CC
operation at 2.5V or 3.3V with I/O compatibility up
to 5V.
The 74ALVT16899 is a 16-bit to 16-bit parity transceiver with
separate transparent latches for the A bus and B bus. Either bus
can generate or check parity. The parity bit can be fed-through with
no change or the generated parity can be substituted with the SEL
input.
The 74ALVT16899 features independent latch enables for the A and
B bus latches, a select pin for ODD/EVEN parity, and separate error
signal output pins for checking parity.
FUNCTIONAL DESCRIPTION:
The 74ALVT16899 has three principal modes of operation which are
outlined below. All modes apply to both the A-to-B and B-to-A
directions.
Transparent latch, Generate parity, Check A and B bus parity:
Bus A (B) communicates to Bus B (A), parity is generated and
passed on to the B (A) Bus as BPAR (APAR). If LEA and LEB are
High and the Mode Select (SEL) is Low, the parity generated from
A0-A7 and B0-B7 can be checked and monitored by ERRA and
ERRB. (Fault detection on both input and output buses.)
Transparent latch, Feed-through parity, Check A and B bus
parity:
Bus A (B) communicates to Bus B (A) in a feed-through mode if SEL
is High. Parity is still generated and checked as ERRA and ERRB
and can be used as an interrupt to signal a data/parity bit error to the
CPU.
Latched input, Generate/Feed-through parity, Check A (and B)
bus parity:
Independent latch enables (LEA and LEB) allow other permutations
of:
Transparent latch / 1 bus latched / both buses latched
Feed-through parity / generate parity
Check in bus parity / check out bus parity / check in and out bus
parity
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
2.5 V
3.3 V
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
C
L
= 50pF
2.0
2.2
1.5
1.7
ns
t
PLH
t
PHL
Propagation delay
An to ERRA
C
L
= 50pF
9.8
7.0
7.8
5.1
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3
3
pF
C
I/O
Output capacitance
Outputs disabled; V
O
= 0V or V
CC
9
9
pF
I
CCZ
Quiescent supply current
Outputs disabled
40
70
μ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°
C to +85
°
C
74ALVT16899
AV16899 DL
SOT371-1
56-Pin Plastic TSSOP Type II
–40
°
C to +85
°
C
74ALVT16899 DGG
AV16899 DGG
SOT364-1
相关PDF资料 |
PDF描述 |
|---|---|
| 74ALVT16899DGG | 2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ALVT16952 | 2.5V/3.3V 16-bit registered transceiver (3-State)(2.5V/3.3V16位寄存收发器（三态）) |
| 74ALVT16952DGG | Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85 |
| 74ALVT16952DL | Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85 |
| 74ALVT16953 | 2.5V/3.3V ALVT 16-bit registered transceiver (3-State)(2.5V/3.3V ALVT 16位寄存收发器（三态）) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 74ALVT16899DGG | 制造商:NXP Semiconductors 功能描述: |
| 74ALVT16899DGG-T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Dual 8-bit Bus Transceiver |
| 74ALVT16952 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 16-bit registered transceiver 3-State |
| 74ALVT16952DGG | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 16-bit registered transceiver 3-State |
| 74ALVT16952DL | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:2.5V/3.3V ALVT 16-bit registered transceiver 3-State |
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