参数资料
| 型号： | 74AUP1G79GN,132 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 1/24页 |
| 文件大小： | 0K |
| 描述： | IC F-F D-TYPE POS-EDGE 6XSON |
| 特色产品： | MicroPak? |
| 标准包装： | 5,000 |
| 系列： | 74AUP |
| 功能： | 标准 |
| 类型： | D 型 |
| 输出类型： | 非反相 |
| 元件数： | 1 |
| 每个元件的位元数： | 1 |
| 频率 - 时钟： | 550MHz |
| 延迟时间 - 传输： | 2ns |
| 触发器类型： | 正边沿 |
| 输出电流高，低： | 4mA，4mA |
| 电源电压： | 0.8 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-XFDFN |
| 包装： | 带卷 (TR) |
| 其它名称： | 74AUP1G79GN132 |
1.
General description
The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock
pulse. The D input must be stable one setup time prior to the LOW-to-HIGH clock
transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 Cto+85 C and 40 Cto+125 C
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Rev. 6 — 28 June 2012
Product data sheet
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74AUP1G79GS | 制造商:NXP Semiconductors 功能描述:IC D F-F POS-EDG LOW PWR X |
| 74AUP1G79GS,132 | 功能描述:触发器 3.6V 14.2ns XSON6 RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74AUP1G79GV | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Low-power D-type flip-flop; positive-edge trigger |
| 74AUP1G79GV,125 | 功能描述:触发器 1CIRC Sngl-D FF 3.6V RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74AUP1G79GW | 制造商:NXP Semiconductors 功能描述:Flip Flop D-Type Pos-Edge 1-Element 5-Pin TSSOP T/R Cut Tape 制造商:NXP Semiconductors 功能描述:IC D F-F POS-EDG LOW PWR T |
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