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| 型号： | 74AVC16836A |
| 英文描述： | 20-bit registered driver with inverted register enable and Dynamic Controlled Outputs(TM) (3-State) |
| 中文描述： | 带反相寄存使能和动态控制输出3态20位寄存驱动器 |
| 文件页数： | 2/10页 |
| 文件大小： | 102K |
| 代理商： | 74AVC16836A |
Philips Semiconductors
Product specification
74AVC16334A
16-bit registered driver with inverted register enable and
Dynamic Controlled Outputs
(3-State)
2
2000 Aug 03
853-2212 24282
FEATURES
Wide supply voltage range of 1.2 V to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7.
CMOS low power consumption
Input/output tolerant up to 3.6 V
DCO (Dynamic Controlled Output) circuit dynamically changes
output impedance, resulting in noise reduction without speed
degradation
Low inductance multiple V
CC
and GND pins for minimum noise
and ground bounce
Power off disables 74AVC16334A outputs, permitting Live
Insertion
Integrated input diodes to minimize input overshoot and
undershoot
Full PC133 solution provided when used with PCK2509S or
PCK2510S and CBT16292
DESCRIPTION
The 74AVC16334A is a 16-bit universal bus driver. Data flow is
controlled by output enable (OE), latch enable (LE) and clock inputs
(CP).
This product is designed to have an extremely fast propagation
delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor (Live
Insertion).
A Dynamic Controlled Output (DCO) circuitry is implemented to
support termination line drive during transient. See the graphs on
page 8 for typical curves.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
28
27
26
25
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
OE
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
GND
GND
V
CC
Y
6
Y
7
Y
8
Y
9
GND
Y
10
Y
11
V
CC
Y
12
Y
13
GND
Y
14
Y
15
NC
CP
A
0
A
1
GND
A
2
A
3
V
CC
A
4
A
5
GND
A
6
A
7
A
8
A
9
GND
A
10
A
11
V
CC
A
12
A
13
GND
A
14
A
15
LE
SH00167
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.0 ns; C
L
= 30 pF.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
An to Yn
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
2.5
1.7
1.5
ns
t
PHL
/t
PLH
Propagation delay
LE to Yn;
CP to Yn
2.7
2.0
1.6
ns
C
I
Input capacitance
3.8
pF
C
PD
Power dissipation capacitance per buffer
V = GND to V
CC1
Outputs enabled
25
pF
Output disabled
6
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ (C
L
×
V
CC2
×
f
o
) where: f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V; (C
L
×
V
CC2
×
f
o
) = sum of outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE
RANGE
–40
°
C to +85
°
C
OUTSIDE NORTH
AMERICA
AVC16334A DGG
NORTH AMERICA
DRAWING
NUMBER
SOT362-1
48-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74AVC16836ADG | 功能描述:总线收发器 20-BIT REG DR W/INV REG (3-S) RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74AVC16836ADGG | 制造商:未知厂家 制造商全称:未知厂家 功能描述:20-Bit Buffer/Driver |
| 74AVC16836ADGG,112 | 功能描述:总线收发器 20-BIT REG DR RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74AVC16836ADGG,118 | 功能描述:总线收发器 20-BIT REG DR RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| 74AVC16836ADG-T | 功能描述:总线收发器 20-BIT REG DR W/INV REG (3-S) RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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