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参数资料
| 型号： | 74AVC16836DGG |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 通用总线功能 |
| 英文描述： | 20-bit registered driver with inverted register enable 3-State |
| 中文描述： | AVC SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封装： | PLASTIC, TSSOP-56 |
| 文件页数： | 6/10页 |
| 文件大小： | 90K |
| 代理商： | 74AVC16836DGG |
Philips Semiconductors
20-bit registered driver with inverted register enable
(3-State)
Preliminary specification
74AVC16836
1999 Jul 23
6
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
≤
2.0 ns; C
L
= 30 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3
±
0.3 V
TYP
1
V
CC
= 2.5
±
0.2 V
TYP
1
V
CC
= 1.8
±
0.15 V
TYP
1
V
CC
= 1.2 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
TYP
Propagation delay
An to Yn
1, 7
0.7
1.7
2.5
0.8
2.0
3.0
1.0
2.6
4.5
5.2
t
PHL
/t
PLH
Propagation delay
LE to Yn
2, 7
0.7
2.0
3.0
0.8
2.4
3.6
1.0
3.0
5.5
6.0
ns
Propagation delay
CP to Yn
3, 7
0.7
1.9
2.9
0.8
2.2
3.3
0.9
2.8
5.2
5.5
t
PZH
/t
PZL
3-State output enable
time OE to Yn
6, 7
1.0
2.5
4.5
1.0
2.8
5.0
1.5
3.5
6.5
6.0
ns
t
PHZ
/t
PLZ
3-State output disable
time OE to Yn
6, 7
1.0
2.5
4.0
1.0
2.4
4.5
1.5
4.0
6.5
6.0
ns
t
W
CP pulse width HIGH
or LOW
3, 7
1.0
–
–
1.2
–
–
2.0
–
–
–
ns
LE pulse width HIGH
2, 7
1.0
–
–
1.2
–
–
2.0
–
–
–
t
SU
Set-up time An to CP
5, 7
0.3
–
–
0.4
–
–
0.5
–
–
–
ns
Set-up time An to LE
4, 7
0.3
–
–
0.4
–
–
0.5
–
–
–
t
h
Hold time An to CP
5, 7
0.3
–
–
0.4
–
–
0.5
–
–
ns
Hold time An to LE
4, 7
0.3
–
–
0.4
–
–
0.5
–
–
F
max
Maximum clock pulse
frequency
3, 7
500
–
–
400
–
–
250
–
–
MHz
NOTES:
1. All typical values are measured at T
amb
= 25
°
C and at V
CC
= 1.8 V, 2.5 V, 3.3 V.
AC WAVEFORMS FOR V
CC
= 3.0 V TO 3.6 V RANGE
V
M
= 0.5 V
V
X
= V
OL
+ 0.300 V
V
Y
= V
OH
– 0.300 V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
AC WAVEFORMS FOR V
CC
= 2.3 V TO 2.7 V AND
V
CC
< 2.3 V RANGE
V
M
= 0.5 V
CC
V
X
= V
OL
+ 0.15 V
V
Y
= V
– 0.15 V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
= V
CC
A
INPUT
t
PHL
t
PLH
V
OL
V
I
GND
V
OH
Y
OUTPUT
SH00132
V
M
V
M
NOTE: V
M
= 0.5V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 1. Input (An) to output (Yn) propagation delay
LE INPUT
Yn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
V
M
V
M
V
M
SH00165
NOTE: V
M
= 0.5 V
CC
at V
CC
= 2.3 to 2.7 V
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
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