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| 型号： | 74HC174DB,118 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 6/13页 |
| 文件大小： | 0K |
| 描述： | IC HEX D FF POS-EDGE TRIG 16SSOP |
| 产品培训模块： | Logic Packages |
| 标准包装： | 2,000 |
| 系列： | 74HC |
| 功能： | 主复位 |
| 类型： | D 型总线 |
| 输出类型： | 反相 |
| 元件数： | 1 |
| 每个元件的位元数： | 6 |
| 频率 - 时钟： | 107MHz |
| 延迟时间 - 传输： | 16ns |
| 触发器类型： | 正边沿 |
| 输出电流高，低： | 5.2mA，5.2mA |
| 电源电压： | 2 V ~ 6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.209"，5.30mm 宽） |
| 包装： | 带卷 (TR) |
| 其它名称： | 74HC174DB-T 74HC174DB-T-ND 935188580118 |
1998 Jul 08
2
Philips Semiconductors
Product specication
Hex D-type ip-op with reset; positive-edge trigger
74HC/HCT174
FEATURES
Six edge-triggered D-type flip-flops
Asynchronous master reset
Output capability: standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT174 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT174 have six edge-triggered D-type
flip-flops with individual D inputs and Q outputs. The
common clock (CP) and master reset (MR) inputs load and
reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D
input, one set-up time prior to the LOW-to-HIGH clock
transition, is transferred to the corresponding output of the
flip-flop.
A LOW level on the MR input forces all outputs LOW,
independently of clock or data inputs.
The device is useful for applications requiring true outputs
only and clock and master reset inputs that are common to
all storage elements.
QUICK REFERENCE DATA
GND = 0 V; Tamb=25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay
CL = 15 pF; VCC =5 V
CP to Qn
17
18
ns
MR to Qn
13
17
ns
fmax
maximum clock frequency
99
69
MHz
CI
input capacitance
3.5
pF
CPD
power dissipation
capacitance per flip-flop
notes 1 and 2
17
pF
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74HC174DB-T | 功能描述:触发器 HEX D-TYPE MASTER RESET RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74HC174D-Q100J | 制造商:NXP Semiconductors 功能描述:74HC174D-Q100/SO16/REEL13// - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP-FLOP HEX D RESET 16SOIC |
| 74HC174D-T | 制造商:NXP Semiconductors 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 1-Element 16-Pin SO T/R |
| 74HC174N | 功能描述:触发器 HEX D-TYPE MASTER RESET RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74HC174N,652 | 功能描述:触发器 HEX D-TYPE MASTER RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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