参数资料
型号: 74HC4511D,653
厂商: NXP Semiconductors
文件页数: 2/12页
文件大小: 0K
描述: IC LATCH/DECODER/DRIVER 16SOIC
标准包装: 1
系列: 74HC
显示器类型: LED
配置: 7 段显示
接口: BCD
电源电压: 2 V ~ 6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SO
包装: 标准包装
其它名称: 568-8157-6

Philips Semiconductors
BCD to 7-segment latch/decoder/driver
Product speci?cation
74HC/HCT4511
FEATURES
? Latch storage of BCD inputs
? Blanking input
? Lamp test input
? Driving common cathode LED displays
? Guaranteed 10 mA drive capability per output
? Output capability: non-standard
? I CC category: MSI
ripple blanking input (BI), an active LOW lamp test input
(LT), and seven active HIGH segment outputs (Q a to Q g ).
When LE is LOW, the state of the segment outputs (Q a to
Q g ) is determined by the data on D 1 to D 4 .
When LE goes HIGH, the last data present on D 1 to D 4 are
stored in the latches and the segment outputs remain
stable.
When LT is LOW, all the segment outputs are HIGH
independent of all other input conditions. With LT HIGH, a
LOW on BI forces all segment outputs LOW. The inputs LT
and BI do not affect the latch circuit.
GENERAL DESCRIPTION
The 74HC/HCT4511 are high-speed Si-gate CMOS
devices and are pin compatible with “4511” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4511 are BCD to 7-segment
latch/decoder/drivers with four address inputs (D 1 to D 4 ),
an active LOW latch enable input (LE), an active LOW
APPLICATIONS
? Driving LED displays
? Driving incandescent displays
? Driving fluorescent displays
? Driving LCD displays
? Driving gas discharge displays
QUICK REFERENCE DATA
GND = 0 V; T amb = 25 ° C; t r = t f = 6 ns
TYPICAL
SYMBOL
t PHL / t PLH
PARAMETER
propagation delay
CONDITIONS
C L = 15 pF; V CC = 5 V
HC
HCT
UNIT
D n to Q n
LE to Q n
BI to Q n
LT to Q n
24
23
19
12
24
24
20
13
ns
ns
ns
ns
C I
input capacitance
3.5
3.5
pF
C PD
power dissipation capacitance per latch
notes 1 and 2
64
64
pF
Notes
1. C PD is used to determine the dynamic power dissipation (P D in μ W):
P D = C PD × V CC2 × f i + ∑ (C L × V CC2 × f o ) where:
f i = input frequency in MHz
f o = output frequency in MHz
∑ (C L × V CC2 × f o ) = sum of outputs
C L = output load capacitance in pF
V CC = supply voltage in V
2. For HC the condition is V I = GND to V CC
For HCT the condition is V I = GND to V CC ? 1.5 V
December 1990
2
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