参数资料
型号: 74LCX16501MEAX
厂商: Fairchild Semiconductor
文件页数: 2/8页
文件大小: 0K
描述: TXRX 18BIT UNIV BUS LV 56SSOP
产品变化通告: Die Material/Mold Compound Change 10/Sept/2008
标准包装: 1,000
系列: 74LCX
逻辑类型: 通用总线收发器
电路数: 18 位
输出电流高,低: 24mA,24mA
电源电压: 2 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 56-SSOP
包装: 带卷 (TR)
www.fairchildsemi.com
2
74LCX16501
Connection Diagram
Truth Table
(Note 2)
Note 2: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA.
Note 3: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Note 4: Output level before the indicated steady-state input conditions
were established.
Functional Description
For A-to-B data flow, the LCX16501 operates in the trans-
parent mode when LEAB is HIGH. When LEAB is LOW,
the A data is latched if CLKAB is held at a high or low logic
level. If LEAB is LOW, the A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB. When
OEAB is HIGH, the outputs are active. When OEAB is
LOW, the outputs are in the high impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
Logic Diagram
Inputs
Output
OEAB
LEAB
CLKAB
An
Bn
L
XXX
Z
HH
X
L
HH
X
H
HL
LL
HL
HH
HL
H
X
B0 (Note 3)
HL
L
X
B0 (Note 4)
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