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参数资料
| 型号： | 74LCX373WMX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 5/12页 |
| 文件大小： | 0K |
| 描述： | IC LATCH TRANSP OCT LV 20SOIC |
| 标准包装： | 1 |
| 系列： | 74LCX |
| 逻辑类型： | D 型透明锁存器 |
| 电路： | 8:8 |
| 输出类型： | 三态 |
| 电源电压： | 2 V ~ 3.6 V |
| 独立电路： | 1 |
| 延迟时间 - 传输： | 1.5ns |
| 输出电流高，低： | 24mA，24mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC |
| 包装： | 标准包装 |
| 其它名称： | 74LCX373WMXDKR |
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LCX373 Rev. 1.8.1
2
74LCX373
—
Lo
w
V
olta
g
e
Octal
T
ransparent
Latc
h
with
5V
T
olerant
Inputs
and
Outputs
Connection Diagrams
Pin Assignments for
SOIC, SOP, SSOP, TSSOP
Pad Assignments for DQFN
(Top View)
Pin Descriptions
Logic Symbols
Truth Table
H = HIGH Voltage
L = LOW Voltage
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH-to-LOW transition
of Latch Enable
Functional Description
The LCX373 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the Dn inputs enters the latches. In this
condition the latches are transparent, i.e. a latch output
will change state each time its D input changes. When
LE is LOW, the latches store the information that was
present on the D inputs a setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the
2-state mode. When OE is HIGH, the standard outputs
are in the high impedance mode but this does not inter-
fere with entering new data into the latches.
Pin Names
Description
D0–D7
Data Inputs
LE
Latch Enable Input
OE
3-STATE Output Enable Input
O0–O7
3-STATE Latch Outputs
D0
D1
O1
O2
D2
D3
O3
GND
O0
D7
D6
O6
O5
D5
D4
O4
O7
LE
VCC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
D0
D1
O1
O2
D2
D3
O3
GND
O0
D7
D6
O6
O5
D5
D4
O4
LE
O7
VCC
120
2
3
4
5
6
7
8
9
10
11
19
18
17
16
15
14
13
12
OE
Inputs
Outputs
LE
OE
Dn
On
XH
X
Z
HL
L
HL
H
LL
X
O0
D0 D1 D2 D3 D4 D5 D6 D7
O0
OE
LE
O1 O2 O3 O4 O5 O6 O7
IEEE/IEC
O0
OE
LE
EN
C1
1D
D0
O1
D1
O2
D2
O3
D3
O4
D4
O5
D5
O6
D6
O7
D7
(Bottom View)
DAP
No Connect
Note: DAP (Die Attach Pad)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74LCX374 | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:LOW VOLTAGE OCTAL D-TYPE FLIP-FLOP WITH 5V TOLERANT INPUTS AND OUTPUTS |
| 74LCX374_04 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:OCTAL D-TYPE FLIP FLOP NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS |
| 74LCX374_06 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs |
| 74LCX374_07 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs |
| 74LCX374_08 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:74LCX374 Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs |
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