参数资料
型号: 74LVCH16245ADGG:11
厂商: NXP Semiconductors
文件页数: 1/20页
文件大小: 0K
描述: IC BUS TXRX TRI-ST 16B 48TSSOP
产品培训模块: Logic Packages
标准包装: 39
系列: 74LVCH
逻辑类型: 收发器,非反相
元件数: 2
每个元件的位元数: 8
输出电流高,低: 24mA,24mA
电源电压: 1.2 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-TFSOP(0.240",6.10mm 宽)
供应商设备封装: 48-TSSOP
包装: 管件
其它名称: 935238470112
1.
General description
The 74LVC16245A; 74LVCH16245A are 16-bit transceivers featuring non-inverting
3-state bus compatible outputs in both send and receive directions. The device features
two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for
direction control. nOE controls the outputs so that the buses are effectively isolated. This
device can be used as two 8-bit transceivers or one 16-bit transceiver.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3 V and 5 V applications.
The 74LVCH16245A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
2.
Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
High-impedance when VCC =0V
All data inputs have bus hold (74LVCH16245A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 Cto+85 C and 40 Cto+125 C
74LVC16245A; 74LVCH16245A
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
Rev. 12 — 13 February 2012
Product data sheet
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