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| 型号： | 74LVCH16374ADGG:11 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 1/20页 |
| 文件大小： | 0K |
| 描述： | IC 16BIT EDGE TRIG D FF 48TSSOP |
| 产品培训模块： | Logic Packages |
| 标准包装： | 39 |
| 系列： | 74LVCH |
| 功能： | 标准 |
| 类型： | D 型总线 |
| 输出类型： | 三态非反相 |
| 元件数： | 2 |
| 每个元件的位元数： | 8 |
| 频率 - 时钟： | 150MHz |
| 延迟时间 - 传输： | 7ns |
| 触发器类型： | 正边沿 |
| 输出电流高，低： | 24mA，24mA |
| 电源电压： | 1.2 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 包装： | 带卷 (TR) |
| 其它名称： | 935238510112 |
1.
General description
The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring
separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state
outputs for bus-oriented applications. It consists of two sections of eight positive
edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for
each octal.
The flip-flops store the state of their individual D-inputs that meet the set-up and hold time
requirements on the LOW-to-HIGH clock (CP) transition.
When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin
nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE
does not affect the state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed 3.3 V and
5 V applications.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused
inputs.
2.
Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pinout architecture
Low inductance multiple supply pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold (74LVCH16374A only)
High-impedance outputs when VCC = 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C to +85 C and 40 C to +125 C
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Rev. 11 — 16 January 2013
Product data sheet
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74LVCH16374ADGGG4 | 制造商:Texas Instruments 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 3-ST 2-Element 48-Pin TSSOP |
| 74LVCH16374ADGG-QJ | 制造商:NXP Semiconductors 功能描述:74LVCH16374ADGG-Q100/TSSOP48/R 制造商:NXP Semiconductors 功能描述:74LVCH16374ADGG-Q100/TSSOP48/R - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP-FLOP 16BIT D 48TSSOP |
| 74LVCH16374ADGGRG4 | 功能描述:触发器 OCTAL FET BUS SWITCH RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74LVCH16374ADG-T | 功能描述:触发器 16-BIT 5V TOL. I/O BUFFER D RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74LVCH16374ADGVRE4 | 功能描述:触发器 OCTAL FET BUS SWITCH RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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