参数资料
型号: 74LVT245SJX
厂商: Fairchild Semiconductor
文件页数: 1/10页
文件大小: 0K
描述: IC TRANSCVR TRI-ST 8BIT 20SOP
标准包装: 2,000
系列: 74LVT
逻辑类型: 收发器,非反相
元件数: 1
每个元件的位元数: 8
输出电流高,低: 32mA,64mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.209",5.30mm 宽)
供应商设备封装: 20-SOIC
包装: 带卷 (TR)
74L
VT245,
74L
VTH245
Lo
w
V
olta
g
e
Octal
Bidirectional
T
ransceiver
with
3-ST
A
TE
Inputs/Outputs
1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVT245, 74LVTH245 Rev. 1.4.0
February 2008
74LVT245, 74LVTH245
Low Voltage Octal Bidirectional Transceiver with 3-STATE
Inputs/Outputs
Features
Input and output interface capability to systems at
5V VCC
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH245),
also available without bushold feature (74LVT245)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink, –32mA/+64mA
Latch-up performance exceeds 500mA
ESD performance:
– Human-body model
> 2000V
– Machine model
> 200V
– Charged-device model
> 1000V
General Description
The LVT245 and LVTH245 contain eight non-inverting
bidirectional buffers with 3-STATE outputs and are
intended for bus-oriented applications. The Transmit/
Receive (T/R) input determines the direction of data flow
through the bidirectional transceiver. Transmit (active-
HIGH) enables data from A ports to B ports; Receive
(active-LOW) enables data from B ports to A ports. The
Output Enable input, when HIGH, disables both A and B
ports by placing them in a HIGH Z condition.
The LVTH245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These transceivers are designed for low-voltage (3.3V)
VCC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT245 and
LVTH245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number
Package Description
74LVT245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVT245SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LVT245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVTH245SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LVTH245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
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