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| 型号： | 74LVT373SJ |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 1/10页 |
| 文件大小： | 0K |
| 描述： | IC LATCH TRANSP OCT 3ST 20SOP |
| 标准包装： | 38 |
| 系列： | 74LVT |
| 逻辑类型： | D 型透明锁存器 |
| 电路： | 8:8 |
| 输出类型： | 三态 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 独立电路： | 1 |
| 延迟时间 - 传输： | 1.5ns |
| 输出电流高，低： | 32mA，64mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SOIC |
| 包装： | 管件 |
74L
VT373,
74L
VTH373
—
Lo
w
V
olta
g
e
Octal
T
ransparent
Latc
h
with
3-ST
A
TE
Outputs
1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74LVT373, 74LVTH373 Rev. 1.5.0
February 2008
74LVT373, 74LVTH373
Low Voltage Octal Transparent Latch with 3-STATE Outputs
Features
■ Input and output interface capability to systems at
5V VCC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH373),
also available without bushold feature (74LVT373)
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink –32 mA/+64 mA
■ Functionally compatible with the 74 series 373
■ ESD performance:
– Human-body model
> 2000V
– Machine model
> 200V
– Charged-device model
> 1000V
General Description
The LVT373 and LVTH373 consist of eight latches with
3-STATE outputs for bus organized system applications.
The latches appear transparent to the data when Latch
Enable (LE) is HIGH. When LE is LOW, the data satisfy-
ing the input timing requirements is latched. Data
appears on the bus when the Output Enable (OE) is
LOW. When OE is HIGH, the bus output is in a high
impedance state.
The LVTH373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These octal latches are designed for low-voltage (3.3V)
VCC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT373 and
LVTH373 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number
Package Description
74LVT373WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVT373SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT373MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH373WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVTH373SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH373MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 74LVT373SJ_Q | 功能描述:闭锁 Octal Trans Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| 74LVT373SJX | 功能描述:闭锁 Octal Trans Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| 74LVT373WM | 功能描述:闭锁 Octal Trans Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| 74LVT373WM_Q | 功能描述:闭锁 Octal Trans Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| 74LVT373WMX | 功能描述:闭锁 Octal Trans Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
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