参数资料
型号: 74LVTH162245G
厂商: Fairchild Semiconductor
文件页数: 1/9页
文件大小: 0K
描述: IC TRANSCVR TRI-ST 16BIT 54FBGA
标准包装: 1,092
系列: 74LVTH
逻辑类型: 收发器,非反相
元件数: 2
每个元件的位元数: 8
输出电流高,低: 12mA,12mA; 32mA,64mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 54-LFBGA
供应商设备封装: 54-BGA
包装: 带卷 (TR)
2005 Fairchild Semiconductor Corporation
DS012446
www.fairchildsemi.com
January 1999
Revised June 2005
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74LVT162245 74LVTH162245
Low Voltage 16-Bit Transceiver with 3-STATE Outputs
and 25
: Series Resistors in A Port Outputs
General Description
The LVT162245 and LVTH162245 contains sixteen non-
inverting bidirectional buffers with 3-STATE outputs and is
intended for bus oriented applications. The device is byte
controlled. Each byte has separate control inputs which
can be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LVT162245 and LVTH162245 are designed with
equivalent 25
: series resistance in both the HIGH and
LOW states on the A Port outputs. This design reduces line
noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
The LVTH162245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) VCC applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT162245
and
LVTH162245 are
fabricated
with
an
advanced
BiCMOS technology to achieve high speed operation simi-
lar to 5V ABT while maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162245),
also available without bushold feature (74LVT162245).
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s A Port outputs include equivalent series resistance of
25
: making external termination resistors unnecessary
and reducing overshoot and undershoot
s A Port outputs source/sink
r12 mA.
B Port outputs source/sink
32 mA/64 mA
s Functionally compatible with the 74 series 162245
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model
! 2000V
Machine model
! 200V
Charged-device model
! 1000V
s Also packaged in plastic Fine Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Package Number
Package Description
74LVT162245G
(Note 1)(Note 2)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT162245MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT162245MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162245G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH162245MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBE]
74LVTH162245MEX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
74LVTH162245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBE]
74LVTH162245MTX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
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74LVTH162245GRE4 功能描述:总线收发器 3.3V ABT 16B 总线收发器 RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel
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