参数资料
型号: 74VCX16374MTDX
厂商: Fairchild Semiconductor
文件页数: 1/10页
文件大小: 0K
描述: IC FLIP FLOP 16BIT D LV 48TSSOP
标准包装: 1
系列: 74VCX
功能: 标准
类型: D 型总线
输出类型: 三态非反相
元件数: 2
每个元件的位元数: 8
频率 - 时钟: 250MHz
延迟时间 - 传输: 1.5ns
触发器类型: 正边沿
输出电流高,低: 24mA,24mA
电源电压: 1.2 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-TFSOP(0.240",6.10mm 宽)
包装: 标准包装
其它名称: 74VCX16374MTDXDKR
2005 Fairchild Semiconductor Corporation
DS500066
www.fairchildsemi.com
October 1997
Revised June 2005
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74VCX16374
Low Voltage 16-Bit D-Type Flip-Flops
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The 74VCX16374 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.0 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model
! 2000V
Machine model
! 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package Number
Package Descriptions
74VCX16374G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX16374MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
s Uses proprietary noise/EMI reduction circuitry
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