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参数资料
| 型号： | 74VHC573T |
| 厂商： | 意法半导体 |
| 英文描述： | Hex Schmitt-Trigger Inverters 14-TVSOP -40 to 85 |
| 中文描述： | 八路D型，3态输出的非反相锁存 |
| 文件页数： | 1/14页 |
| 文件大小： | 289K |
| 代理商： | 74VHC573T |
1/14
November 2004
I
HIGH SPEED: t
PD
= 5.0 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 573
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.9V (MAX.)
I
I
I
I
I
I
I
I
I
DESCRIPTION
The 74VHC573 is an advanced high-speed
CMOS OCTAL D-TYPE LATCH with 3 STATE
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
These 8 bit D-Type latch are controlled by a latch
enable input (LE) and an output enable input (OE).
While the LE inputs is held at a high level, the Q
outputs will follow the data input precisely. When
the LE is taken low, the Q outputs will be latched
precisely at the logic level of D input data. While
the (OE) input is low, the 8 outputs will be in a
normal logic state (high or low logic level) and
while (OE) is in high level, the outputs will be in a
high impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC573
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUTS NON INVERTING
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
TSSOP
74VHC573MTR
74VHC573TTR
TSSOP
SOP
Rev. 5
相关PDF资料 |
PDF描述 |
|---|---|
| 74VHC573MTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHC573TTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHC573MTC | Octal D-Type Latch with 3-STATE Outputs |
| 74VHC573 | Octal D-Type Latch with 3-STATE Outputs |
| 74VHC573M | Hex Schmitt-Trigger Inverters 14-SSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 74VHC573TTR | 功能描述:闭锁 Octal "D" Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| 74VHC574 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74VHC574_04 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING |
| 74VHC574FT | 功能描述:IC D-TYPE POS TRG SNGL 20TSSOP 制造商:toshiba semiconductor and storage 系列:74VHC 包装:剪切带（CT） 零件状态:在售 功能:标准 类型:D 型 输出类型:三态，非反相 元件数:1 每元件位数:8 时钟频率:115MHz 不同 V，最大 CL 时的最大传播延迟:10.6ns @ 5V，50pF 触发器类型:正边沿 电流 - 输出高，低:8mA，8mA 电压 - 电源:2 V ~ 5.5 V 电流 - 静态（Iq):4μA 输入电容:4pF 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 基本零件编号:74VHC574 标准包装:1 |
| 74VHC574FT(BE) | 制造商:Toshiba America Electronic Components 功能描述:IC D-TYPE POS TRG SNGL 20TSSOP |
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