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参数资料
| 型号： | 75232 |
| 厂商： | System Logic Semiconductor Co., Ltd. |
| 英文描述： | Line Driver / Receiver |
| 中文描述： | 线路驱动器/接收器 |
| 文件页数： | 5/12页 |
| 文件大小： | 189K |
| 代理商： | 75232 |
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206C – MAY 1995 – REVISED JULY 1998
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended operating free-air temperature range, V
DD
= 9 V,
V
SS
= –9 V, V
CC
= 5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
VOL
IIH
IIL
High-level output voltage
VIL = 0.8 V,
VIH = 1.9 V,
VI = 5 V,
VI = 0,
RL = 3 k
,
RL = 3 k
,
See Figure 2
See Figure 1
6
7.5
V
Low-level output voltage (see Note 3)
See Figure 1
–7.5
–6
V
μ
A
mA
High-level input current
10
Low-level input current
See Figure 2
–1.6
IOS(H)
High-level short-circuit output current
(see Note 4)
Low-level short-circuit output current
VIL = 0.8 V,
VO = 0,
See Figure 1
–4.5
–12
–19.5
mA
IOS(L)
rO
NOTES:
VIH = 2 V,
VCC = VDD = VSS = 0,
VO = 0,
See Figure 1
4.5
12
19.5
mA
Output resistance (see Note 5)
VO = –2 V to 2 V
300
3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only (e.g., if –10 V is maximum, the typical value is a more negative voltage).
4. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
5. Test conditions are those specified by TIA/EIA-232-F and as listed above.
switching characteristics, V
CC
= 5 V, V
DD
= 12 V, V
SS
= –12 V, T
A
= 25
°
C
PARAMETER
Propagation delay time,
low- to high-level output
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH
RL= 3 k
RL = 3 k
to 7 k
,
CL= 15 pF
CL = 15 pF,
See Figure 3
315
500
ns
tPHL
Propagation delay time,
high- to low-level output
75
175
ns
tTLH
Transition time, low- to
high-level output
RL = 3 k
to 7 k
,
RL = 3 k
to 7 k
,
RL = 3 k
to 7 k
,
RL = 3 k
to 7 k
,
CL = 15 pF,
CL = 2500 pF,
CL = 15 pF,
CL = 2500 pF,
See Figure 3
60
100
ns
μ
s
ns
μ
s
See Figure 3 and Note 6
1.7
2.5
tTHL
Transition time, high- to
low-level output
See Figure 3
40
75
See Figure 3 and Note 6
1.5
2.5
NOTE 6: Measured between
±
3-V and
±
3-V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs are tied either high
or low.
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