参数资料
型号: 7805ALPRPDS
厂商: MAXWELL TECHNOLOGIES
元件分类: ADC
英文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28
封装: RAD-PAK, DIP-28
文件页数: 2/34页
文件大小: 605K
代理商: 7805ALPRPDS
Memory
PRELIMINARY
10
All data sheets are subject to change without notice
2001 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected ADC
7805ALP
12.19.01 Rev 6
1000583
Example Circuits for Using the 7805A
Figure 2 shows a typical application circuit for using the 7805A as an input to a digital data processor. This circuit
shows the use of the STATUS pin to tri-state the control inputs when the latchup protection circuit cycles the power to
the protected ADS7805 die.
Figure 3 shows a typical application circuit for connecting the 7805A to a 16-bit data bus with multiple drivers on the
bus. Tri-state buffers are used to isolate the 7805A data outputs from the data bus. Figure 4 shows the typical applica-
tion circuit for connecting the 7805A to an 8-bit data bus.
FIGURE 4. TYPICAL 7805A APPLICATION CIRCUIT
27
VANA
DECPLNG The ADS7805 VANA and V
DIG die pads are connected together and are available
at the DECPLNG pin. This pin allows external ceramic capacitors to directly decou-
ple the power inputs to the ADS7805 die-to-analog ground. Decoupling capaci-
tance should not exceed 0.2 uF typical. This pin must not be connected to a power
supply directly since this will defeat the latchup protection circuitry. Electrolytic filter
capacitors should not be connected to this pin but should be connected between
the V
S pin and ground.
28
V
DIG
V
S
This is the power supply input for the LPT circuitry and the protected ADS7805 die.
This supply should be treated as an analog supply with filtering and/or isolation
from the noisy system digital power supply. The LPT latchup current sense and
power switch circuitry is located between this pin and the DECPLNG pin.
TABLE 16. PIN DIFFERENCES
PIN NUMBER
ADS7805
7805A
PIN DIFFERENCE DESCRIPTION
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