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参数资料
| 型号： | 7809LPRPFK |
| 厂商： | MAXWELL TECHNOLOGIES |
| 元件分类： | ADC |
| 英文描述： | 16-Bit Latchup Protected Analog to Digital Converter |
| 中文描述： | 3-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, DFP24 |
| 封装： | FP-24 |
| 文件页数： | 8/23页 |
| 文件大小： | 462K |
| 代理商： | 7809LPRPFK |
M
8
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
7809LP
01.11.05 Rev 7
Selecting Output
Format
x
x
x
x
x
x
x
x
x
x
x
x
0
3
1
Serial data is output in
Binary Two’s Comple-
ment format.
Serial data is output in
Straight Binary format.
1. See Figure 4 for constraints on previous data valid during conversion.
T
ABLE
13. 7809LP I
NPUT
R
ANGE
C
ONNECTION
A
NALOG
I
NPUT
R
ANGE
C
ONNECT
R1
IN
VIA
200
TO
C
ONNECT
R2
IN
VIA
100
TO
C
ONNECT
R3
IN
TO
I
MPEDANCE
±10V
±5V
±3.3V
0V to 10V
0V to 5V
0V to 4V
V
IN
AGND
V
IN
V
IN
V
IN
AGND
AGND
CAP
CAP
CAP
AGND
V
IN
V
IN
22.9 k
13.3 k
10.7 k
13.3k
10.0 k
10.7 k
AGND
V
IN
AGND
AGND
V
IN
T
ABLE
14. 7809LP C
ONVERSION
AND
D
ATA
T
IMING
(T
A
= -40
°
C
TO
85
°
C
UNLESS
OTHERWISE
SPECIFIED
)
S
YMBOL
D
ESCRIPTION
S
UBGROUPS
M
IN
T
YP
M
AX
U
NIT
t1
Convert Pulse Width
9, 10, 11
40
--
6000
ns
t2
BUSY Delay
9, 10, 11
--
--
65
ns
t3
BUSY LOW
9, 10, 11
--
--
8
μs
t4
BUSY Delay after End of Conversion
9, 10, 11
--
220
--
ns
t5
Aperture Delay
9, 10, 11
--
40
--
ns
t6
Conversion Time
9, 10, 11
--
7.6
8
μs
t7
Acquisition Time
9, 10, 11
--
--
2
μs
t6 + t7
Throughput Time
9, 10, 11
--
9
10
μs
t8
R/C Low to DATACLK Delay
9, 10, 11
--
450
--
ns
t9
DATACLK Period
9, 10, 11
--
440
--
ns
t10
Data Valid to DATACLK HIGH Delay
9, 10, 11
20
75
--
ns
t11
Data Valid after DATACLK LOW
Delay
9, 10, 11
100
125
--
ns
t12
External DATACLK
9, 10, 11
100
--
--
ns
T
ABLE
12. 7809LP C
ONTROL
L
INE
F
UNCTIONS
FOR
R
EAD
AND
C
ONVERT
S
PECIFIC
F
UNCTION
CS
R/C
BUSY
EXT/INT
DATACL
K
PWRD
SB/BTC
O
PERATION
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