参数资料
型号: 78P2351-DB-CMI
厂商: Maxim Integrated Products
文件页数: 4/42页
文件大小: 0K
描述: DEMO BOARD 78P2351
标准包装: 1
系列: *
78P2351
Single Channel
OC-3/ STM1-E/ E4 LIU
Page: 12 of 42
2006 Teridian Semiconductor Corporation
Rev. 2.4
REGISTER DESCRIPTION (continued)
ADDRESS 0-1: INTERRUPT CONTROL REGISTER
This register selects the events that would cause the interrupt pins to be activated. User may set as many bits as
required.
BIT
NAME
TYPE
DFLT
VALUE
DESCRIPTION
7
INPOL
R/W
0
Interrupt Pin Polarity Selection:
0 : Interrupt output is active-low (default)
1 : Interrupt output is active-high
6:2
--
R/W
01000
Reserved for future use
1
MTLOL
R/W
1
TXLOL Error Mask (active low):
Gates the TXLOL register bit to the INTTXB interrupt pin.
0: Mask
1: Pass
0
MFERR
R/W
1
FIERR Error Mask (active low):
Gates the respective FIERR register bit to the INTTXB interrupt pin.
0: Mask
1: Pass
ADDRESS 0-2: I/O CONTROL REGISTER
BIT
NAME
TYPE
DFLT
VALUE
DESCRIPTION
7:1
--
R/W
XXXXXXX
Unused
0
RCSL
R/W
0
Redundant Channel Enable:
Enables transmit monitor outputs at CMI2P/N pins.
0: Disable
1: Enable
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