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参数资料
| 型号： | 795T |
| 厂商： | 意法半导体 |
| 英文描述： | 3V Supervisor with Battery Switchover |
| 中文描述： | 3V的监控与电池切换 |
| 文件页数： | 26/32页 |
| 文件大小： | 304K |
| 代理商： | 795T |
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STM690/704/795/802/804/805/806
26/32
Note: 1. Valid for Ambient Operating Temperature: T
A
= –40 to 85°C; V
CC
= V
RST
(max) to 5.5V; and V
BAT
= 2.8V (except where noted).
2. V
CC
supply current, logic input leakage, Watchdog functionality, Push-button Reset functionality, PFI functionality, state of RST and
RST tested at V
BAT
= 3.6V, and V
CC
= 5.5V. The state of RST or RST and PFO is tested at V
CC
= V
CC
(min). Either V
CC
or V
BAT
can go to 0V if the other is greater than 2.0V.
3. V
CC
(min) = 1.0V for T
A
= 0°C to +85°C.
4. Tested at V
BAT
= 3.6V, V
CC
= 3.5V and 0V.
5. Guaranteed by design.
6. The leakage current measured on the RST pin (STM804/805) or RST pin (STM795) is tested with the reset output not asserted
(output high impedance).
7. Not valid for STM795/804/805 (open drain).
8. When V
BAT
> V
CC
> V
SW
, V
OUT
remains connected to V
CC
until V
CC
drops below V
SW
.
9. When V
SW
> V
CC
> V
BAT
, V
OUT
remains connected to V
CC
until V
CC
drops below the battery voltage (V
BAT
) – 75mV.
10. The reset threshold tolerance is wider for V
CC
rising than for V
CC
falling due to the 10mV (typ) hysteresis, which prevents internal
oscillation.
Reset Thresholds
V
RST(10)
Reset Threshold
STM690T/
704T/795T/
805T
V
CC
Falling
3.00
3.075
3.15
V
V
CC
Rising
3.00
3.085
3.17
V
STM802T/
804T/806T
V
CC
Falling
V
CC
Rising
V
CC
Falling
3.00
3.075
3.12
V
3.00
3.085
3.14
V
STM690S/
704S/795S/
805S
2.85
2.925
3.00
V
V
CC
Rising
2.85
2.935
3.02
V
STM802S/
804S/806S
V
CC
Falling
V
CC
Rising
V
CC
Falling
2.88
2.925
3.00
V
2.88
2.935
3.02
V
STM690R/
704R/795R/
805R
2.55
2.625
2.70
V
V
CC
Rising
2.55
2.635
2.72
V
STM802R/
804R/806R
V
CC
Falling
V
CC
Rising
2.59
2.625
2.70
V
2.59
2.635
2.72
V
t
rec
RST Pulse Width
V
CC
< 3.6V
140
200
280
ms
Push-button Reset Input (STM704/806)
t
MLMH
t
MR
t
MLRL
t
MRD
Watchdog Timer (NOT available on STM704/795/806)
t
WD
Watchdog Timeout Period
MR Pulse Width
100
20
ns
MR to RST Output Delay
60
500
ns
V
RST
(max) < V
CC
< 3.6V
V
RST
(max) < V
CC
< 3.6V
1.12
1.60
2.24
s
WDI Pulse Width
100
20
ns
Chip-Enable Gating (STM795 only)
E-to-E
CON
Resistance
E-to-E
CON
Propagation Delay
Reset-to-E
CON
High Delay
V
CC
= V
RST
(max)
V
CC
= V
RST
(max)
46
2
7
ns
10
μs
I
SC
E
CON
Short Circuit Current
V
CC
= 3.6V, Disable Mode,
E
CON
= 0V
0.1
0.75
2.0
mA
Sym
Alter-
native
Description
Test Condition
(1)
Min
Typ
Max
Unit
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