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参数资料
| 型号： | 85C92 |
| 厂商： | Microchip Technology Inc. |
| 英文描述： | 4K CMOS Serial EEPROM(4K位,5.0V CMOS串行EEPROM) |
| 中文描述： | 4K的的CMOS串行EEPROM（4K的位和5.0V的CMOS串行EEPROM的） |
| 文件页数： | 6/8页 |
| 文件大小： | 105K |
| 代理商： | 85C92 |
85C72/82/92
DS11182C-page 6
1995 Microchip Technology Inc.
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a start condition followed by the control byte
for a write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If the cycle is complete, then the device will return the
ACK and the master can then proceed with the next
read or write command. See Figure 7-1 for flow dia-
gram.
FIGURE 7-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)
Next
Operation
No
Yes
8.0
READ MODE
This mode illustrates master device reading data from
the 85C72/82/92.
As can be seen from Figure 8-1, the master first sets up
the slave and word addresses by doing a write.
During this period the 85C72/82/92 generates the nec-
essary acknowledge bits as defined in the appropriate
section.
The master now generates another START condition
and transmits the slave address again, except this time
the read/write bit is set into the read mode. After the
slave generates the acknowledge bit, it then outputs
the data from the addressed location on to the SDA pin,
increments the address pointer and, if it receives an
acknowledge from the master, will transmit the next
consecutive byte. This autoincrement sequence is
only aborted when the master sends a STOP condition
instead of an acknowledge.
Note:
Although this is a read mode, the address
pointer must be written to.
Note 1:
If the master knows where the address
pointer is, it can begin the read sequence
at point ‘R’ indicated on Figure 8-1 and
save time transmitting the slave and word
addresses.
In all modes, the address pointer will auto-
matically increment from the end of the
memory block (256 byte) back to the first
location in that block.
Note 2:
FIGURE 8-1:
READ MODE
R
START
A
WORD ADDRESS
A
0
R/W
ACKNOWLEDGES FROM SLAVE RECEIVER
START
SLAVE
ADDRESS
1
STOP
LAST
DATA BYTE
SLAVE
ADDRESS
A
R/W
AUTO INCREMENT
WORD ADDRESS
A
DATA BYTE 1
ACKNOWLEDGES FROM MASTER RECEIVER
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 85C92/J | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 85C92/P | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 85C92/SL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 85C92/SM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
| 85C92/SN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:I2C Serial EEPROM |
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