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参数资料
| 型号： | 8761CYILF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | XO, clock |
| 英文描述： | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件页数： | 1/16页 |
| 文件大小： | 284K |
| 代理商： | 8761CYILF |
8761CYI
www.idt.com
REV. C JULY 27, 2010
1
ICS8761I
LOW VOLTAGE, LOW SKEW,
PCI / PCI-X CLOCK GENERATOR
OEA
MR
D_SELA0
D_SELA1
REF_CLK
XTAL_SEL
FB_IN
PLL_SEL
OEB
D_SELB1
D_SELB0
OEC
D_SELC1
D_SELC0
OED
D_SELD1
D_SELD0
FBDIV_SEL1
FBDIV_SEL0
GENERAL DESCRIPTION
The ICS8761I is a low voltage, low skew PCI / PCI-X clock
generator. The ICS8761I has a selectable REF_CLK or
crystal input. The REF_CLK input accepts LVCMOS or LVTTL
input levels. The ICS8761I has a fully integrated PLL along
with frequency configurable clock and feedback outputs for
multiplying and regenerating clocks with “zero delay”. Using
a 20MHz or 25MHz crystal or a 33.333MHz or 66.666MHz
reference frequency, the ICS8761I will generate output
frequencies of 33.333MHz, 66.666MHz, 100MHz and
133.333MHz simultaneously.
The low impedance LVCMOS/LVTTL outputs of the ICS8761I
are designed to drive 50
Ω series or parallel terminated
transmission lines.
FEATURES
Fully integrated PLL
Seventeen LVCMOS/LVTTL outputs,
15
Ω typical output impedance
Selectable crystal oscillator interface
or LVCMOS/LVTTL REF_CLK
Maximum output frequency: 166.67MHz
Maximum crystal input frequency: 40MHz
Maximum REF_CLK input frequency: 83.33MHz
Individual banks with selectable output dividers
for generating 33.333MHz, 66.66MHz, 100MHz
and 133.333MHz simultaneously
Separate feedback control for generating PCI / PCI-X
frequencies from a 20MHz or 25MHz crystal or 33.333MHz
or 66.666MHz reference frequency
Cycle-to-cycle jitter: 70ps (maximum)
Period jitter, RMS: 17ps (maximum)
Output skew: 250ps (maximum)
Bank skew: 50ps (maximum)
Static phase offset: 0 ± 150ps (maximum)
Full 3.3V or 3.3V core, 2.5V multiple output supply modes
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
XTAL1
XTAL2
QA0
QA1
QA2
QA3
QB0
QB1
QB2
QB3
FB_OUT
÷3
÷4
÷6
÷12
0 0
0 1
1 0
1 1
0
1
0 0
0 1
1 0
1 1
QC0
QC1
QC2
QC3
QD0
QD1
QD2
QD3
PLL
OSC
0
1
÷6
÷12
÷16
÷20
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
64-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
ICS8761I
REF_CLK
GND
XTAL1
XTAL2
VDD
XTAL_SEL
PLL_SEL
VDDA
VDD
D_SELC0
D_SELC1
OEC
OEA
D_SELA0
D_SELA1
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
GND
FB_OUT
VDDOFB
FB_IN
VDD
FBDIV_SEL0
FBDIV_SEL1
MR
VDD
D_SELD0
D_SELD1
OED
OEB
D_SELB0
D_SELB1
GND
QA0
V
DDOA
QA1
GND
QA2
V
DDOA
QA3
GND
QB0
V
DDOB
QB1
GND
QB2
V
DDOB
QB3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
GND
QC0
V
DDOC
QC1
GND
QC2
V
DDOC
QC3
GND
QD0
V
DDOD
QD1
GND
QD2
V
DDOD
QD3
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PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 8761CYILFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 8761CYLF | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 8761CYLFT | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Generator Single 64-Pin LQFP T/R 制造商:Integrated Device Technology Inc 功能描述:64 LQFP (LEAD-FREE) - Tape and Reel |
| 8761CYLN | 制造商:IDT from Components Direct 功能描述:IDT 8761CYLN PLL - Trays 制造商:IDT 功能描述:IDT 8761CYLN PLL |
| 8761CYT | 制造商:Integrated Device Technology Inc 功能描述:8761CYT - Tape and Reel |
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