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参数资料
| 型号： | 8P001SRA1305C15 |
| 厂商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分类： | SRAM |
| 英文描述： | 512K X 16 MULTI DEVICE SRAM CARD, 150 ns, XMA68 |
| 封装： | CARD2-68 |
| 文件页数： | 8/10页 |
| 文件大小： | 111K |
| 代理商： | 8P001SRA1305C15 |
February 2002 Rev. 6
7
PCMCIA SRAM Memory Card
SRA Series
PC Card Products
150ns
SYM
(PCMCIA)
Parameter
Min
Max
Unit
t
CW
Write Cycle Time
150
ns
t
w(WE)
Write Pulse Width
80
ns
t
su(A)
Address Setup Time
20
ns
t
su(A-WEH)
Address Setup Time for WE#
100
ns
t
su(CE-WEH)
Card Enable Setup Time for WE#
100
ns
t
su(D-WEH)
Data Setup Time for WE#
50
ns
t
h(D)
Data Hold Time
20
ns
t
rec(WE)
Write Recover Time
20
ns
t
dis(WE)
Output Disable Time from WE#
75
ns
t
dis(OE)
Output Disable Time from OE#
75
ns
t
en(WE)
Output Enable Time from WE#
5
ns
t
dis(OE)
Output Enable Time from OE#
5
ns
t
su(OE-WE)
Output Enable Setup from WE#
10
ns
t
h(OE-WE)
Output Enable Hold from WE#
10
ns
t
su(CE)
Card Enable Setup Time from OE#
0
ns
t
h(CE)
Card Enable Hold Time
20
ns
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Write Timing Diagram
Write Timing Parameters
th (O E - W E )
NO T E 1
/C E 1 , /C E 2
NO T E 1
ts u ( C E - W E H )
tc (W )
A [2 5 ::0 ], /R E G
tw (W E )
td is (W E )
th (D )
D [ 15 : :0] ( D in )
D A T A IN P U T
ts u ( A )
ts u ( A - W E H )
/O E
ts u ( C E )
t s u ( D- W E H)
tre c (W E )
th (C E )
ts u ( O E - W E )
td is (O E )
D [ 15 : :0] ( D ou t )
te n ( O E )
te n ( W E )
NO T E 2
/W E
Notes:
1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be applied to the
data pins (D15 - D0) by the host system.
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