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参数资料
| 型号： | 9250BF-16LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, GREEN, SSOP-56 |
| 文件页数： | 1/19页 |
| 文件大小： | 570K |
| 代理商： | 9250BF-16LF |
Integrated
Circuit
Systems, Inc.
ICS9250-16
Third party brands and names are the property of their respective owners.
Block Diagram
9250-16 Rev H 9/5/00
Recommended Application:
810/810E type chipset.
Output Features:
3 CPU (2.5V) 66.6/133.3MHz (up to 150MHz
achievable through I
2C)
9 SDRAM (3.3V) @ 133.3MHz (up to 150MHz
achievable through I
2C)
8 PCI (3.3 V) @33.3MHz
2 IOAPIC (2.5V) @ 33.3MHz
2 Hublink clocks (3.3 V) @ 66.6MHz
2 USB (3.3V) @ 48MHz ( Non spread spectrum)
1 REF (3.3V) @ 14.318MHz
Features:
Supports spread spectrum modulation,
down spread 0 to -0.5% and ± 0.25% center spread.
I
2C support for power management
Efficient power management scheme through PD#
Uses external 14.138MHz crystal
Alternate frequency selections available through I
2C
control.
Functionality
Pin Configuration
56-Pin 300mil SSOP
* This input has a 50KW pull-down to GND.
*FS2//REF0
VDD0
X1
X2
GND0
GND1
3V66-0
3V66-1
VDD1
VDD2
PCICLK0
PCICLK1
PCICLK2
GND2
PCICLK3
PCICLK4
GND2
PCICLK5
PCICLK6
PCICLK7
VDD2
VDD3
GND3
GND4
48MHz_0
48MHz_1
VDD4
FS0
GNDL1
IOAPIC0
IOAPIC1
VDDL1
CPUCLK0
VDDL0
CPUCLK1
CPUCLK2
GNDL0
GND5
SDRAM0
SDRAM1
VDD5
SDRAM2
SDRAM3
GND5
SDRAM4
SDRAM5
VDD5
SDRAM6
SDRAM7
GND5
SDRAM_F
VDD5
PD#
SCLK
SDATA
FS1
ICS9250-16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
REF0
CPU66/100/133 [2:0]
VDDL
3V66 [1:0]
SDRAM [7:0]
PCICLK [7:0]
IOAPIC [1:0]
VDDL
SDRAM_F
PLL2
48MHz [1:0]
X1
X2
XTAL
OSC
Control
Logic
Config
Reg
FS(2:0)
PD#
2
3
2
8
1
8
2
/2
/3
/2
PLL1
Spread
Spectrum
SDATA
SCLK
Frequency Generator & Integrated Buffers for Celeron & PII/III
2
S
F1
S
F0
S
Fn
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X0
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3
1
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D
S
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
相关PDF资料 |
PDF描述 |
|---|---|
| 9250BF-16-T | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 9250BF-16 | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 9250BF-16LF-T | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 9250BF-27 | 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 9250BF-27LFT | 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 9250BF27LF | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Dual 56-Pin SSOP Tube |
| 9250BF-27LF | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 9250BF-27LFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 9250BF-28LF | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Single 56-Pin SSOP Tube |
| 9250BF-28LFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Single 56-Pin SSOP T/R |
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