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参数资料
| 型号： | 932S200BFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, GREEN, SSOP-56 |
| 文件页数： | 9/14页 |
| 文件大小： | 130K |
| 代理商： | 932S200BFLFT |
4
ICS932S200
0427C—07/03/02
Power Management Requirements:
Note:
1. Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable goes
low/high to the first valid clock comes out of the device.
2. Power up latency is when PWR_DWN# goes inactive (high to when the first valid clocks are dirven from the device.
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CPU_STOP# Timing Diagram
CPU_STOP# is an asynchronous input to the clock synthesizer. It is used to turn off the CPU and 3V66 clocks for
low power operation. CPU_STOP# is asserted asynchronously by the external clock control logic with the rising edge
of free running PCI clock (and hence CPU clock) and must be internally synchronized to the external output. All other
clocks will continue to run while the CPU clocks are disabled. The CPU clocks must always be stopped in a low state
and started in such a manner as to guarantee that the high pulse width is a full pulse.
Notes:
1. All timing is referenced to the internal CPUCLK.
2. The internal label means inside the chip and is a reference only.
This in fact may not be the way that the control is designed.
3. 3V66 clocks also stop/start before
4. PD# and PCI_STOP# are shown in a high state.
5. Diagrams shown with respect to 133MHz. Similar operation when
CPU is 100MHz
CPUCLK
(internal)
(externall)
PCICLK
PCI_STOP#
CPU_STOP#
PD#
CPUCLK
3V66
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 932S203AFLN | 功能描述:时钟发生器及支持产品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 932S203AFLNT | 功能描述:时钟发生器及支持产品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 932S203AGLF | 功能描述:时钟发生器及支持产品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 932S203AGLFT | 功能描述:时钟发生器及支持产品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 932S203YFLXT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Frequency Generator with 133MHz Differential CPU Clocks |
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