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参数资料
| 型号： | 933714120653 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 计数器 |
| 英文描述： | HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14 |
| 封装： | SOT-108-1, SO-14 |
| 文件页数： | 10/11页 |
| 文件大小： | 135K |
| 代理商： | 933714120653 |
Philips Semiconductors - PIP - 74HC/HCT393; Dual 4-bit binary ripple counter
Product Information
74HC/HCT393; Dual
4-bit binary ripple
counter
Information as of 2003-04-23
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Applications
Block diagram
topGeneral description
The 74HC/HCT393 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (1MR
and 2MR) inputs to each counter. The operation of each half of the '393' is the same as the '93' except no external
clock connections are required.
The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally
connected to provide clock inputs to succeeding stages. The outputs of the ripple counter do not change
synchronously and should not be used for high-speed address decoding.
The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the “1” and “2” in the
pin description.
A HIGH level on the nMR input overrides the clock and sets the outputs LOW.
topFeatures
q
Two 4-bit binary counters with individual clocks
q
Divide-by any binary module up to 28 in one package
q
Two master resets to clear each 4-bit counter individually
q
Output capability: standard
q
ICC category: MSI
topDatasheet
Page
count
File
size
(kB)
Datasheet
74HC/HCT393 Dual 4-bit
binary ripple
counter
12/1/1990
Product specification 7
45
Additional datasheet info
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT393N.html (1 of 4) [Apr-29-2003 10:53:08 AM]
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