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参数资料
| 型号： | 935036630602 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | F/FAST SERIES, 5 2 LINE TO 1 LINE MULTIPLEXER, CONFIGURABLE OUTPUT, PDSO20 |
| 封装： | 7.50 MM, PLASTIC, MS-013AC, SOT-163-1, SO-20 |
| 文件页数： | 9/16页 |
| 文件大小： | 132K |
| 代理商： | 935036630602 |
Philips Semiconductors
Product specification
74F711A/74F711–1/
74F712A/74F712–1
Multiplexers
74F711A
Quint 2-to-1 Data Selector Multiplexer (3-State)
74F711-1 Quint 2-to-1 Data Selector Multiplexer with 30
W Equivalent Output Termination Impedance (3-State)
74F712A
Quint 3-to-1 Data Selector Multiplexer
74F712-1 Quint 3-to-1 Data Selector Multiplexer with 30
W Equivalent Output Termination Impedance
2
1990 Dec 13
853-1368 01258
FEATURES for 74F711A/74F711-1
Consists of five 2-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20
A in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
Output inverting/non-inverting option
30W termination impedance on each output – 74F711-1
Outputs sink 64mA (74F711A only)
FEATURES for 74F712A/74F712-1
Consists of five 3-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20
A in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
30W termination impedance on each output – 74F712-1
Outputs sink 64mA (74F712A only)
DESCRIPTION
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F711A has a common select (S) input, an
Output Enable (OE) input and an Output Inverting (INV) input to
control the 3-State outputs. The outputs source 15mA and sink
64mA. The 74F711-1 is the same as the 74F711A except that is has
a 30
W termination impedance on each output to reduce line noise
and the 3-State outputs sink 5mA.
When the inverting input (INV) is Low, the input data path is
inverted.
To improve speed and noise immunity, VCC and GND side pins are
used.
The 74F712A/74F712-1 consist of five 3-to1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing
applications. The 74F712A has two select (S0, S1) inputs to
determine which set of five inputs will be propagated to the five
outputs. The outputs source 15mA and sink 64mA. The 74F712-1 is
the same as the 74F712A except that it has a 30
W termination
impedance on each output to reduce line noise and the outputs sink
5mA.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F711A
6.0ns
30mA
74F711-1
6.5ns
29mA
74F712A
6.5ns
25mA
74F712-1
6.5ns
25mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ± 10%
Tamb = 0° C to +70°C
PKG DWG #
20-Pin Plastic DIP
N74F711AN, N74F711-1N
SOT146-1
24-Pin Plastic Slim
DIP (300 mil)
N74F712AN, N74F712-1N
SOT222-1
20-Pin Plastic SOL
N74F711AD, N74F711-1D
SOT163-1
24-Pin Plastic SOL
N74F712AD, N74F712-1D
SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Dna, Dnb
Data inputs
1.0/0.066
20
A/40A
S
Select input
1.0/0.033
20
A/20A
74F711A/
OE
Output Enable input (active Low)
1.0/0.033
20
A/20A
74F711-1
INV
Output inverting input (active Low)
1.0/0.033
20
A/20A
Q0 - Q4
Data outputs for 74F711A
750/106.7
15mA/64mA
Q0 - Q4
Data outputs for 74F711-1
750/8.33
15mA/5mA
Dna, Dnb, Dnc
Data inputs
1.0/0.066
20
A/40A
74F712A/
S0, S1
Select inputs
1.0/0.033
20
A/20A
74F712-1
Q0 - Q4
Data outputs for 74F712A
750/106.7
15mA/64mA
Q0 - Q4
Data outputs for 74F712-1
750/8.33
15mA/5mA
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20
A in the High state and 0.6mA in the Low state.
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