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参数资料
| 型号： | 935049490118 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 计数移位寄存器 |
| 英文描述： | F/FAST SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封装： | PLASTIC, SOT-109, SO-16 |
| 文件页数： | 9/13页 |
| 文件大小： | 151K |
| 代理商： | 935049490118 |
Philips Semiconductors
Product specification
74F195A
4-bit parallel-access shift register
1996 Mar 12
5
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
NO TAG
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONSNO TAG
MIN
TYP
NO TAG
MAX
UNIT
VO
High level output voltage
VCC = MIN, VIL = MAX
±10%VCC
2.5
V
VOH
High-level output voltage
CC
,
IL
VIH = MIN, IOH = MAX
±5%VCC
2.7
3.4
V
VO
Low level output voltage
VCC = MIN, VIL = MAX
±10%VCC
0.35
0.50
V
VOL
Low-level output voltage
CC
,
IL
VIH = MIN, IOL = MAX
±5%VCC
0.35
0.50
V
VIK
Input clamp voltage
VCC = MIN, II = IIK
–0.73
–1.2
V
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
74F195A
100
A
IIH
High-level input current
VCC = MAX, VI = 2.7V
all others
20
A
IIL
Low-level input current
VCC = MAX, VI = 0.5V
74F195A
–600
mA
IOS
Short-circuit output current3
VCC = MAX
–60
–150
mA
ICC
Supply current (total)
VCC = MAX
74F195A
40
58
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
f
Maximum clock
Load mode
Waveform
165
180
150
MHz
fMAX
frequency
Shift mode
NO TAG
180
190
170
MHz
tPLH
tPHL
Propagation delay
CP to Qn
Waveform
NO TAG
3.0
2.5
5.0
4.0
9.5
7.0
2.5
2.0
10.0
7.5
ns
tPLH
tPHL
Propagation delay
CP to Q3
Waveform
NO TAG
2.0
5.5
4.0
9.5
6.5
2.5
2.0
9.5
7.0
ns
tPHL
Propagation delay
MR to Qn
Waveform 2
2.0
4.0
7.0
2.0
7.0
ns
tPLH
Propagation delay
MR to Q3
Waveform 2
2.5
4.5
8.0
2.0
10.0
ns
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