参数资料
型号: 935269667118
厂商: NXP SEMICONDUCTORS
元件分类: 总线收发器
英文描述: CBT/FST/QS/5C/B SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO48
封装: 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP3-48
文件页数: 5/8页
文件大小: 86K
代理商: 935269667118
Philips Semiconductors
Product specification
CBT16210
20-bit bus switch with 10-bit output enables
2000 Oct 12
5
AC CHARACTERISTICS
GND = 0 V; tR; CL = 50 pF
SYMBOL
PARAMETER DESCRIPTION
LIMITS
–40
°C to +85°C VCC = 5 V ± 0.5 V
UNITS
Min
Mean
Max
tpd
Propagation delay1
250
ps
tPZH
Output enable time to HIGH level
1.5
3.3
5.0
ns
tPHZ
Output disable time from HIGH level
1.0
2.4
4.5
ns
tPZL
Output enable time to LOW level
1.5
4.0
6.5
ns
tPLZ
Output disable time from LOW level
1.5
3.8
6.0
ns
NOTES:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 3.0 V
INPUT
1.5V
OUTPUT
tPLH
tPHL
SA00028
1.5V
3 V
0 V
VOH
VOL
Waveform 1. Input (An) to Output (Yn) Propagation Delays
Output Control
(Low-level
enabling
1.5 V
tPZH
tPHZ
VOH
VOL
tPZL
tPLZ
3.5V
0V
VOL + 0.3V
VOH – 0.3V
SA00029
1.5 V
0V
3V
Output
Waveform 1
S1 at 7 V
(see Note)
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
Output
Waveform 2
S1 at Open
(see Note)
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
CL = 50 pF
500
Load Circuit
DEFINITIONS
CL =
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
TEST
S1
tpd
open
tPLZ/tPZL
7 V
tPHZ/tPZH
open
SA00012
500
From Output
Under Test
S1
7 V
Open
GND
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