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参数资料
| 型号： | 93AA46-I/MS |
| 元件分类： | PROM |
| 英文描述： | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封装： | PLASTIC, MSOP-8 |
| 文件页数： | 16/20页 |
| 文件大小： | 510K |
| 代理商： | 93AA46-I/MS |
2002 Microchip Technology Inc.
DS21749A-page 5
93XX46, 93XX46A/B
2.0
FUNCTIONAL DESCRIPTION
When the ORG* pin is connected to V
CC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is nor-
mally held in a high-Z state except when reading data
from the device, or when checking the READY/BUSY
status during a programming operation. The ready/
busy status can be verified during an Erase/Write oper-
ation by polling the DO pin; DO low indicates that pro-
gramming is still in progress, while DO high indicates
the device is ready. The DO will enter the high-Z state
on the falling edge of the CS.
2.1
START Condition
The START bit is detected by the device if CS and DI
are both HIGH with respect to the positive edge of CLK
for the first time.
Before a START condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
START condition), without resulting in any device oper-
ation (READ, WRITE, ERASE, EWEN, EWDS, ERAL,
and WRAL). As soon as CS is HIGH, the device is no
longer in the Standby mode.
An instruction following a START condition will only be
executed if the required amount of opcode, address
and data bits for any particular instruction is clocked in.
After execution of an instruction (i.e., clock in or out of
the last required address or data bit) CLK and DI
become don't care bits until a new START condition is
detected.
2.2
Data In/Data Out (DI/DO)
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the READ operation, if A0 is a logic
HIGH level. Under such a condition the voltage level
seen at Data Out is undefined and will depend upon the
relative impedances of Data Out and the signal source
driving A0. The higher the current sourcing capability of
A0, the higher the voltage at the Data Out pin.
2.3
Data Protection
During power-up, all programming modes of operation
are inhibited until V
CC exceeds a typical voltage level of
1.5V for 'AA' and 'LC' devices or 3.8V for 'C' devices.
During power-down, the source data protection cir-
cuitry acts to inhibit all programming modes when V
CC
falls below 1.4V for 'AA' and 'LC' devices or 3.5V for 'C'
devices.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before any ERASE or WRITE instruction can
be executed.
*Org pin is not available on A/B devices
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PDF描述 |
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| 93LC46-I/MS | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93C46T-I/MS | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC46T-E/MS | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC46-E/MS | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC46T-I/MS | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 93AA46P | 制造商:Microchip Technology Inc 功能描述: |
| 93AA46-P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 1.8V Microwire Serial EEPROM |
| 93AA46-SM | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 1.8V Microwire Serial EEPROM |
| 93AA46-SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 1.8V Microwire Serial EEPROM |
| 93AA46T/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K/2K/4K 1.8V Microwire Serial EEPROM |
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