参数资料
型号: 93AA56AT-I/MC
厂商: Microchip Technology
文件页数: 9/36页
文件大小: 0K
描述: IC EEPROM 2KBIT 2MHZ 8DFN
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 2K (256 x 8)
速度: 1MHz,2MHz
接口: Microwire 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-VFDFN 裸露焊盘
供应商设备封装: 8-DFN(2x3)
包装: 标准包装
产品目录页面: 1451 (CN2011-ZH PDF)
其它名称: 93AA56AT-I/MCDKR
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.6
Erase/Write Disable and Enable
(EWDS/EWEN)
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or Vcc is removed from the device.
The 93XX56A/B/C powers up in the Erase/Write
Disable ( EWDS ) state. All programming modes must be
preceded by an Erase/Write Enable ( EWEN ) instruction.
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all erase/write
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent of
both the EWEN and EWDS instructions.
FIGURE 2-5:
EWDS TIMING
T CSL
CS
CLK
DI
1
0
0
0
0
x
???
x
FIGURE 2-6:
EWEN TIMING
T CSL
CS
CLK
DI
1
0
0
1
1
x
???
x
2.7 Read
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (if ORG pin is low or A-version
devices) or 16-bit (if ORG pin is high or B-version
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (T PD ). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
FIGURE 2-7:
CS
CLK
READ TIMING
DI
1
1
0
A N
? ? ?
A0
DO
High-Z
0
Dx
???
D0
Dx
???
D0
Dx
???
D0
? 2003-2011 Microchip Technology Inc.
DS21794G-page 9
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