参数资料
型号: 93AA56BT-I/MC
厂商: Microchip Technology
文件页数: 10/36页
文件大小: 0K
描述: IC EEPROM 2KBIT 2MHZ 8DFN
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 2K (128 x 16)
速度: 1MHz,2MHz
接口: Microwire 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-VFDFN 裸露焊盘
供应商设备封装: 8-DFN(2x3)
包装: 标准包装
产品目录页面: 1451 (CN2011-ZH PDF)
其它名称: 93AA56BT-I/MCDKR
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.8 Write
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA56A/B/C and 93LC56A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C56A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
The DO pin indicates the Ready/ Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (T CSL ). DO at logical ‘ 0 ’ indicates that programming
is still in progress. DO at logical ‘ 1 ’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note: After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/ Busy status from DO.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
T CSL
CS
CLK
DI
1
0
1
A N
???
A0
Dx
???
D0
T SV
T CZ
DO
High-Z
Busy
Ready
High-Z
T WC
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
T CSL
CS
CLK
DI
1
0
1
A N
???
A0
Dx
???
D0
T SV
T CZ
DO
High-Z
Busy
Ready
High-Z
T WC
DS21794G-page 10
? 2003-2011 Microchip Technology Inc.
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