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参数资料
| 型号： | 93C46A-I/MCG |
| 元件分类： | PROM |
| 英文描述： | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封装： | 2 X 3 MM, 0.90 MM HEIGHT, LEAD FREE, PLASTIC, MO-229, DFN-8 |
| 文件页数： | 28/28页 |
| 文件大小： | 420K |
| 代理商： | 93C46A-I/MCG |
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2005 Microchip Technology Inc.
DS21749F-page 9
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.6
Erase/Write Disable and Enable
(EWDS/EWEN)
The 93XX46A/B/C powers up in the Erase/Write Disable
(EWDS) state. All Programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed or
Vcc is removed from the device.
To protect against accidental data disturbance, the EWDS
instruction can be used to disable all erase/write functions
and should follow all programming operations. Execution
of a READ instruction is independent of both the EWEN and
EWDS
instructions.
FIGURE 2-5:
EWDS TIMING
FIGURE 2-6:
EWEN TIMING
2.7
Read
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (if ORG pin is low or A-Version
devices) or 16-bit (if ORG pin is high or B-version
devices) output string.
The output data bits will toggle on the rising edge of the
CLK and are stable after the specified time delay (TPD).
Sequential read is possible when CS is held high. The
memory data will automatically cycle to the next register
and output sequentially.
FIGURE 2-7:
READ TIMING
CS
CLK
DI
10
00
0
x
x
TCSL
1x
CS
CLK
DI
00
1
x
TCSL
CS
CLK
DI
DO
11
0
An
A0
High-Z
0
Dx
D0
Dx
D0
Dx
D0
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| 93LC46AXTI/SN | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93C46AX-I/PG | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 93C46AK | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46AKI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46AN | 制造商:Texas Instruments 功能描述: |
| 93C46AP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46API | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
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