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参数资料
| 型号： | 93C46A-I/STG |
| 元件分类： | PROM |
| 英文描述： | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封装： | 4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-8 |
| 文件页数： | 28/30页 |
| 文件大小： | 548K |
| 代理商： | 93C46A-I/STG |
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2008 Microchip Technology Inc.
DS21749G-page 7
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.4
Erase
The ERASE instruction forces all data bits of the
specified address to the logical ‘1’ state. CS is brought
low following the loading of the last address bit. This
falling edge of the CS pin initiates the self-timed
programming cycle, except on ‘93C’ devices where the
rising edge of CLK before the last address bit initiates
the write cycle.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
FIGURE 2-1:
ERASE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-2:
ERASE TIMING FOR 93C DEVICES
Note:
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/Busy status from DO.
CS
CLK
DI
DO
TCSL
Check Status
1
AN
AN-1
AN-2
A0
TSV
TCZ
Busy
Ready
High-Z
TWC
High-Z
CS
CLK
DI
DO
TCSL
Check Status
11
1
AN
AN-1
AN-2
A0
TSV
TCZ
Busy
Ready
High-Z
TWC
High-Z
相关PDF资料 |
PDF描述 |
|---|---|
| 93C46B-E/PG | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
| 93C46AT-I/ST | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93C46CXT-I/MC | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93AA46AT-I/SN | 128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 93LC46C-I/PG | 64 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 93C46AK | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46AKI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46AN | 制造商:Texas Instruments 功能描述: |
| 93C46AP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
| 93C46API | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microwire Serial EEPROM |
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