参数资料
| 型号： | 93C86AT-E/OT |
| 厂商： | Microchip Technology |
| 文件页数： | 7/38页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16KBIT 3MHZ SOT23-6 |
| 标准包装： | 3,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 3MHz |
| 接口： | Microwire 3 线串行 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-23-6 |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
2.4
Erase
The DO pin indicates the Ready/ Busy status of the
The ERASE instruction forces all data bits of the
specified address to the logical ‘ 1 ’ state. The rising
edge of CLK before the last address bit initiates the
write cycle.
device if CS is brought high after a minimum of 250 ns
low (T CSL ). DO at logical ‘ 0 ’ indicates that programming
is still in progress. DO at logical ‘ 1 ’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
Note:
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/ Busy status from DO.
FIGURE 2-1:
ERASE TIMING
T CSL
CS
CLK
Check Status
DI
1
1
1
A N
A N -1 A N -2
???
A0
T SV
T CZ
DO
High-Z
Busy
Ready
High-Z
T WC
2.5
Erase All (ERAL)
The DO pin indicates the Ready/ Busy status of the
The Erase All ( ERAL ) instruction will erase the entire
memory array to the logical ‘ 1 ’ state. The ERAL cycle
device, if CS is brought high after a minimum of 250 ns
low (T CSL ).
is identical to the erase cycle, except for the different
Note:
After the ERAL command is complete,
opcode. The ERAL cycle is completely self-timed. The
rising edge of CLK before the last data bit initiates the
write cycle. Clocking of the CLK pin is not necessary
after the device has entered the ERAL cycle.
issuing a Start bit and then taking CS low
will clear the Ready/ Busy status from DO.
V CC must be ? 4.5V for proper operation of ERAL.
FIGURE 2-2:
ERAL TIMING
T CSL
CS
CLK
Check Status
DI
1
0
0
1
0
x
???
x
T SV
T CZ
DO
High-Z
Busy
Ready
High-Z
T EC
? 2003-2012 Microchip Technology Inc.
DS21797L-page 7
相关PDF资料 |
PDF描述 |
|---|---|
| 93AA86CT-I/ST | IC EEPROM 16KBIT 3MHZ 8TSSOP |
| 93AA86CT-I/MS | IC EEPROM 16KBIT 3MHZ 8MSOP |
| 93LC86C-I/ST | IC EEPROM 16KBIT 3MHZ 8TSSOP |
| 24LC32A-E/MS | IC EEPROM 32KBIT 400KHZ 8MSOP |
| 5206514-1 | CONN D-SUB SLIDING LOCK POST KIT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 93C86ATEOTG | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K Microwire Compatible Serial EEPROM |
| 93C86ATEPG | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K Microwire Compatible Serial EEPROM |
| 93C86ATESNG | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K Microwire Compatible Serial EEPROM |
| 93C86ATESTG | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:16K Microwire Compatible Serial EEPROM |
| 93C86AT-I/CH | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K-16K Microwire Compatible Serial EEPROMs |
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