参数资料
| 型号： | 93LC76T-I/SN |
| 厂商： | Microchip Technology |
| 文件页数： | 11/22页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 8KBIT 3MHZ 8SOIC |
| 标准包装： | 3,300 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 8K（1K x 8 或 512 x 16） |
| 速度： | 2MHz，3MHz |
| 接口： | Microwire 3 线串行 |
| 电源电压： | 2.5 V ~ 6.0 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
93LC76/86
4.0
PIN DESCRIPTIONS
After detection of a Start condition the specified number
of clock cycles (respectively low-to-high transitions of
TABLE 4-1:
Name
CS
PIN FUNCTION TABLE
Function
Chip Select
CLK) must be provided. These clock cycles are
required to clock in all opcode, address, and data bits
before an instruction is executed (see Table 1-3
through Table 1-6 for more details). CLK and DI then
become “don't care” inputs waiting for a new Start
condition to be detected.
CLK
DI
DO
V SS
ORG
PE
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Memory Configuration
Program Enable
Note:
4.3
CS must go low between consecutive
instructions, except when performing a
sequential read (Refer to Section 3.1
“READ” for more detail on sequential
reads).
Data In (DI)
V CC
Power Supply
Data In is used to clock in a Start bit, opcode, address
and data synchronously with the CLK input.
4.1
Chip Select (CS)
4.4
Data Out (DO)
A high level selects the device. A low level deselects
the device and forces it into Standby mode. However, a
programming cycle which is already initiated will be
completed, regardless of the CS input signal. If CS is
brought low during a program cycle, the device will go
into Standby mode as soon as the programming cycle
is completed.
CS must be low for 250 ns minimum (T CSL ) between
Data Out is used in the Read mode to output data
synchronously with the CLK input (T PD after the
positive edge of CLK).
This pin also provides Ready/Busy status information
during erase and write cycles. Ready/Busy status infor-
mation is available when CS is high. It will be displayed
until the next Start bit occurs as long as CS stays high.
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
4.5
Organization (ORG)
When ORG is connected to V CC , the x16 memory orga-
4.2
Serial Clock (CLK)
nization is selected. When ORG is tied to V SS , the x8
The Serial Clock is used to synchronize the communi-
cation between a master device and the 93LC76/86.
Opcode, address and data bits are clocked in on the
memory organization is selected. There is an internal
pull-up resistor on the ORG pin that will select x16
organization when left unconnected.
positive edge of CLK. Data bits are also clocked out on
the positive edge of CLK.
4.6
Program Enable (PE)
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (T CKH ) and
clock low time (T CKL ). This gives the controlling master
freedom in preparing opcode, address and data.
CLK is a “don't care” if CS is low (device deselected). If
CS is high, but Start condition has not been detected,
any number of clock cycles can be received by the
device without changing its status (i.e., waiting for Start
condition).
CLK cycles are not required during the self-timed
WRITE (i.e., auto erase/write) cycle.
? 2010 Microchip Technology Inc.
This pin allows the user to enable or disable the ability
to write data to the memory array. If the PE pin is
floated or tied to V CC , the device can be programmed.
If the PE pin is tied to V SS , programming will be
inhibited. There is an internal pull-up on this device that
enables programming if this pin is left floating.
DS21131F-page 11
相关PDF资料 |
PDF描述 |
|---|---|
| XC6SLX100-3FG484I | IC FPGA SPARTAN 6 484FGGBGA |
| 93LC76-I/SN | IC EEPROM 8KBIT 3MHZ 8SOIC |
| XC6SLX100-3FGG484I | IC FPGA SPARTAN 6 101K 484FGGBGA |
| 93AA86/SN | IC EEPROM 16KBIT 3MHZ 8SOIC |
| XC6SLX100-3CSG484I | IC FPGA SPARTAN 6 101K 484CSDBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 93LC86/P | 功能描述:电可擦除可编程只读存储器 1024x16-2048x8 PDIP8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| 93LC86-/P | 制造商:Microchip Technology 功能描述:16k(2k~8 / 1k~16) 2MHz 2.5V to 5.5V VA / Microwire 8DIP Bulk |
| 93LC86/P | 制造商:Microchip Technology Inc 功能描述:EEPROM IC Memory Type:Serial EEPROM |
| 93LC86/PG | 制造商:Microchip Technology 功能描述:EEPROM Serial-3Wire 16K-bit 2K x 8/1K x 16 3.3V/5V 8-Pin PDIP |
| 93LC86/SN | 功能描述:电可擦除可编程只读存储器 1024x16-2048x8 SOIC8 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
发布紧急采购，3分钟左右您将得到回复。