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参数资料
| 型号： | 951462YGLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO64 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-64 |
| 文件页数： | 1/23页 |
| 文件大小： | 241K |
| 代理商： | 951462YGLFT |
Integrated
Circuit
Systems, Inc.
ICS951462
1094J—03/16/09
Pin Configuration
Recommended Application:
ATI RS/RD690 systems using AMD K8 processors & SB600
Southbridge
Output Features:
2 - pairs of CPU pairs
8 - pairs of SRC pairs
4 - pairs of ATIG pairs
1 - HyperTransport 66MHz clock seed
2 - 48MHz USB clock
3 - 14.318MHz Reference clock
Key Specifications:
CPU outputs cycle-to-cycle jitter < 85ps
SRC outputs cycle-to-cycle jitter < 125ps
ATIG outputs cycle-to-cycle jitter < 125ps
+/- 300ppm frequency accuracy on CPU, SRC & ATIG
clocks
Features/Benefits:
3 - Programmable Clock Request pins for SRC and ATIG
clocks
ATIGCLKs are programmable for frequency
Spread Spectrum for EMI reduction
Outputs may be disabled via SMBus
External crystal load capacitors for maximum frequency
accuracy
Programmable System Clock Chip for ATI RS/RD690 - K8
TM based Systems
*Other names and brands may be claimed as the property of others.
Power Groups
Functionality
GNDREF 1
64 FS0/REF0
VDDREF 2
63 FS1/REF1
X1 3
62 FS2/REF2
X2 4
61 PD**
VDD48 5
60 VDDHTT
48MHz_0 6
59 HTTCLK0
48MHz_1 7
58 GNDHTT
GND48 8
57 *CLKREQA#
SMBCLK 9
56 CPUCLK8T0
SMBDAT 10
55 CPUCLK8C0
RESET_IN#11
54VDDCPU
SRCCLKT7 12
53 GNDCPU
SRCCLKC7 13
52 CPUCLK8T1
VDDSRC 14
51 CPUCLK8C1
GNDSRC 15
50 VDDA
SRCCLKT6 16
49 GNDA
SRCCLKC6 17
48 IREF
SRCCLKT5 18
47 SRCCLKT0
SRCCLKC5 19
46 SRCCLKC0
SRCCLKT4 20
45 GNDSRC
SRCCLKC4 21
44 VDDSRC
GNDSRC 22
43 SRCCLKT1
VDDSRC 23
42 SRCCLKC1
SRCCLKT3 24
41 ATIGCLKT0
SRCCLKC3 25
40 ATIGCLKC0
SRCCLKT2 26
39 VDDATIG
SRCCLKC2 27
38 GNDATIG
VDDSRC 28
37 ATIGCLKT1
GNDSRC 29
36 ATIGCLKC1
ATIGCLKT330
35ATIGCLKT2
ATIGCLKC3 31
34 ATIGCLKC2
*CLKREQB#32
33*CLKREQC#
64-TSSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
IC
S
951462
VDD
GND
5
8
USB_48 outputs
14,23,28,44 15,22,29,45
SRCCLK outputs
39
38
ATIGCLK differential outputs
50
49
Analog, PLL
54
53
CPUCLK8 differential outputs
60
58
HTTCLK output
2
1
REF outputs
Pin Number
Description
FS2
FS1
FS0
CPU
MHz
HTT
MHz
SRC
MHz
ATIG
MHz
USB
MHz
000Hi-Z
Hi-Z
100.00
48.00
001
X / 2
X / 3
100.00
48.00
0
1
0
230.00
76.67
100.00
48.00
0
1
240.00
80.00
100.00
48.00
1
0
100.00
66.66
100.00
48.00
1
0
1
133.33
66.66
100.00
48.00
1
0
166.67
66.66
100.00
48.00
1
200.00
66.66
100.00
48.00
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| 951 | WIRE TERMINAL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 951463AGLF | 制造商:Integrated Device Technology Inc 功能描述:951463AGLF - Rail/Tube |
| 951463BFLF | 制造商:Integrated Device Technology Inc 功能描述:PC MAIN CLOCK 制造商:Integrated Device Technology Inc 功能描述:56 SSOP (LEAD FREE) - Rail/Tube |
| 951463BFLFT | 制造商:Integrated Device Technology Inc 功能描述:PC MAIN CLOCK 制造商:Integrated Device Technology Inc 功能描述:56 SSOP (LEAD FREE) - Tape and Reel |
| 951463BGLF | 制造商:Integrated Device Technology Inc 功能描述:PC MAIN CLOCK |
| 951463BGLFT | 制造商:Integrated Device Technology Inc 功能描述:PC MAIN CLOCK |
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