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参数资料
| 型号： | 95V842YF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 0.150 INCH, LEAD FREE, MO-137, SSOP-16 |
| 文件页数： | 5/9页 |
| 文件大小： | 75K |
| 代理商： | 95V842YF-T |
5
ICS95V842
0830B—11/24/08
Notes:
1.
2.
3.
4. Does not include jitter.
Switching characteristics are guaranteed for application frequency range. The
PLL Locks over the Max Clock Frequency range, but the device doe not
necessarily meet other timing parameters.
Refers to transition on noninverting output in PLL bypass mode.
While the pulse skew is almost constant over frequency, the duty cycle error
increases at higher frequencies. This is due to the formula: duty cycle=twH/tc,
were the cycle (tc) decreases as the frequency goes up.
Switching Characteristics
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Max clock frequency
3
freqop
40
333
MHz
Application Frequency
Range
3
freqApp
60
220
MHz
Input clock duty cycle
dtin
40
60
%
Input clock slew rate
tsl(I)
12
v/ns
CLK stabilization
TSTAB
100
s
Low-to high level propagation
delay time
tPLH
1
CLK_IN to any output
5.5
ns
High-to low level propagation
delay time
tPHL
1
CLK_IN to any output
5.5
ns
Output enable time
ten
PD# to any output
5
ns
Output disable time
tdis
PD# to any output
5
ns
Period jitter
tjit (per)
-75
75
ps
Half-period jitter
tjit(hper)
-75
75
ps
Output clock slew rate
tsl(o)
12.5
v/ns
Cycle to Cycle Jitter
tcyc-tcyc
-75
75
ps
Static Phase Offset
t(spo)
-50
50
ps
Output to Output Skew
tskew
40
60
ps
Over the application
frequency range
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| 95V847AGIT | 95V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 95V847AG | 功能描述:时钟驱动器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| 95V847AGI | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP Tube 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver |
| 95V847AGIT | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver |
| 95V847AGLF | 功能描述:时钟驱动器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| 95V847AGLFT | 功能描述:时钟驱动器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
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