参数资料
型号: 95V857ALLF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封装: 4.40 MM, 0.40 MM PITCH, LEAD FREE, MO-153, TSSOP-48
文件页数: 1/13页
文件大小: 137K
代理商: 95V857ALLF-T
Integrated
Circuit
Systems, Inc.
ICS95V857
0674S—12/27/04
Block Diagram
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Pin Configuration
48-Pin TSSOP/TVSOP
Recommended Application:
DDR Memory Modules / Zero Delay Board Fan Out
Provides complete DDR registered DIMM solution
with ICSSSTVF16857, ICSSSTVF16859 or
ICSSSTV32852
Product Description/Features:
Low skew, low jitter PLL clock driver
1 to 10 differential clock distribution (SSTL_2)
Feedback pins for input to output synchronization
PD# for power management
Spread Spectrum-tolerant inputs
Auto PD when input signal removed
Specifications:
Meets PC3200 Class A+ specification for DDR-I 400
support
Covers all DDRI speed grades
Switching Characteristics:
CYCLE - CYCLE jitter: <50ps
OUTPUT - OUTPUT skew: <40ps
Period jitter: ±30ps
S
T
U
P
N
IS
T
U
P
T
U
O
e
t
a
t
S
L
P
D
V
A#
D
PT
N
I
_
K
L
CC
N
I
_
K
L
CT
K
L
CC
K
L
CT
T
U
O
_
B
FC
T
U
O
_
B
F
D
N
GH
L
H
L
H
L
H
f
o
/
d
e
s
a
p
y
B
D
N
GH
H
L
H
L
H
L
f
o
/
d
e
s
a
p
y
B
V
5
.
2
)
m
o
n
(
LL
H
Z
f
o
V
5
.
2
)
m
o
n
(
LH
LZ
Z
f
o
V
5
.
2
)
m
o
n
(
HL
H
L
H
n
o
V
5
.
2
)
m
o
n
(
HH
L
H
L
H
L
n
o
V
5
.
2
)
m
o
n
(
X)
z
H
M
0
2
<
)
1
(
ZZ
Z
f
o
Functionality
PLL
FB_INT
FB_INC
CLK_INC
CLK_INT
PD#
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKT6
CLKT7
CLKT8
CLKT9
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
CLKC6
CLKC7
CLKC8
CLKC9
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
GND
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
CLKC2
CLKT2
VDD
CLK_INT
CLK_INC
VDD
AVDD
AGND
GND
CLKC3
CLKT3
VDD
CLKT4
CLKC4
GND
CLKC5
CLKT5
VDD
CLKT6
CLKC6
GND
CLKC7
CLKT7
VDD
PD#
FB_INT
FB_INC
VDD
FB_OUTC
FB_OUTT
GND
CLKC8
CLKT8
VDD
CLKT9
CLKC9
GND
IC
S95V857
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
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29
28
27
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25
相关PDF资料
PDF描述
95V857AGLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
95V857AKT 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
95V857AGT-LF 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
95V857AKLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
95V857AHLFT 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56
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95VLP857AGLFT 功能描述:IC CLK BUF DDR 233MHZ 1CIRC 制造商:idt, integrated device technology inc 系列:- 包装:带卷(TR) 零件状态:过期 PLL:是 主要用途:存储器,DDR 输入:LVCMOS 输出:SSTL-2 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大值:233MHz 电压 - 电源:2.3 V ~ 2.7 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TFSOP(0.240",6.10mm 宽) 供应商器件封装:48-TSSOP 标准包装:1,000
95VLP857AHLF 制造商:Integrated Device Technology Inc 功能描述:IDT 95VLP857AHLF, Zero Delay PLL Clock Driver Single 45MHz to 233MHz 56-Pin CABGA Tray