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参数资料
| 型号： | 9DB833AFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | ROHS COMPLIANT, SSOP-48 |
| 文件页数： | 13/18页 |
| 文件大小： | 226K |
| 代理商： | 9DB833AFLFT |
9DB833
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
IDT
EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
4
9DB833
REV C 052411
Pin Descriptions (cont.)
PIN #
PIN NAME
PIN TYPE
DESCR IPTION
25
GND
PWR
Ground pin.
26
GND
PWR
Ground pin.
27
VDD
PWR
Power supply, nominal 3.3V
28
SMB_ADR_tri
IN
SMBus address select bit. This is a tri-level input that decodes 1 of 3 SMBus
Addresses.
29
DIF_4#
OUT
0.7V differential Complementary clock output
30
DIF_4
OUT
0.7V differential true clock output
31
VDD
PWR
Power supply, nominal 3.3V
32
GND
PWR
Ground pin.
33
DIF_5#
OUT
0.7V differential Complementary clock output
34
DIF_5
OUT
0.7V differential true clock output
35
OE5#
IN
Active low input for enabling DIF pair 5.
1 =disable outputs, 0 = enable outputs
36
OE6#
IN
Active low input for enabling DIF pair 6.
1 =disable outputs, 0 = enable outputs
37
DIF_6#
OUT
0.7V differential Complementary clock output
38
DIF_6
OUT
0.7V differential true clock output
39
VDD
PWR
Power supply, nominal 3.3V
40
PD#
IN
Asynchronous active low input pin used to power dow n the device. The internal
clocks are disabled and the VCO and the crystal osc. (if any) are stopped.
41
DIF_7#
OUT
0.7V differential Complementary clock output
42
DIF_7
OUT
0.7V differential true clock output
43
OE4#
IN
Active low input for enabling DIF pair 4
1 =disable outputs, 0 = enable outputs
44
OE7#
IN
Active low input for enabling DIF pair 7.
1 =disable outputs, 0 = enable outputs
45
LOCK
OUT
3.3V output indicating PLL Lock Status. This pin goes high when lock is achieved.
46
IREF
OUT
This pin establishes the reference for the differential current-mode output pairs. It
requires a fixed precision resistor to ground. 475ohm is the standard value for
100ohm differential impedance. Other impedances require different values. See
data sheet.
47
GNDA
PWR
Ground pin for the PLL core.
48
VDDA
PWR
3.3V power for the PLL core.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9DB833AGILF | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB833AGILFT | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB833AGLF | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB833AGLFT | 功能描述:时钟缓冲器 8 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DBL0242BKILF | 功能描述:IC CLK FANOUT/BUFF ZD 24VFQFPN 制造商:idt, integrated device technology inc 系列:- 包装:托盘 零件状态:在售 PLL:是 主要用途:PCI Express（PCIe） 输入:HCSL 输出:HCSL 电路数:1 比率 - 输入:输出:1:2 差分 - 输入:输出:是/是 频率 - 最大值:200MHz 电压 - 电源:3.135 V ~ 3.465 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商器件封装:24-VFQFPN（4x4） 标准包装:490 |
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