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参数资料
| 型号： | 9LPRS501SKLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC64 |
| 封装： | ROHS COMPLIANT, PLASTIC, MLF-64 |
| 文件页数： | 1/27页 |
| 文件大小： | 228K |
| 代理商： | 9LPRS501SKLF |
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ICS9LPRS501
1121G—05/19/11
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE
REGULATOR + INTEGRATED SERIES RESISTOR
1
Datasheet
IDTTM/ICSTM
64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
Recommended Application:
Key Specifications:
CK505 compliant clock with fully integrated voltage
regulator and Internal series resistor on differential outputs,
PCIe Gen 1 compliant
CPU outputs cycle-cycle jitter < 85ps
SRC output cycle-cycle jitter < 125ps
PCI outputs cycle-cycle jitter < 250ps
+/- 100ppm frequency accuracy on CPU & SRC
clocks
TSSOP Pin Configuration
Output Features:
2 - CPU differential low power push-pull pairs
10 - SRC differential low power push-pull pairs
1 - CPU/SRC selectable differential low power push-pull
pair
1 - SRC/DOT selectable differential low power push-pull
pair
5 - PCI, 33MHz
1 - PCI_F, 33MHz free running
1 - USB, 48MHz
1 - REF, 14.318MHz
Features/Benefits:
Does not require external pass transistor for voltage
regulator
Integrated series resistors on differential outputs,
Zo=50
Ω
Supports spread spectrum modulation, default is 0.5%
down spread
Uses external 14.318MHz crystal, external crystal
load caps are required for frequency tuning
One differential push-pull pair selectable between
SRC and two single-ended outputs
Table 1: CPU Frequency Select Table
PCI0/CR#_A 1
64 SCLK
VDDPCI 2
63 SDATA
PCI1/CR#_B 3
62 REF0/FSLC/TEST_SEL
PCI2/TME 4
61 VDDREF
PCI3 5
60 X1
PCI4/SRC5_EN 6
59 X2
PCI_F5/ITP_EN 7
58 GNDREF
GNDPCI 8
57 FSLB/TEST_MODE
VDD48 9
56 CK_PWRGD/PD#
USB_48MHz/FSLA 10
55 VDDCPU
GND4811
54CPUT0
VDD96_IO 12
53 CPUC0
DOTT_96/SRCT0 13
52 GNDCPU
DOTC_96/SRCC0 14
51 CPUT1_F
GND 15
50 CPUC1_F
VDD 16
49 VDDCPU_IO
SRCT1/SE1 17
48 NC
SRCC1/SE2 18
47 CPUT2_ITP/SRCT8
GND 19
46 CPUC2_ITP/SRCC8
VDDPLL3_IO 20
45 VDDSRC_IO
SRCT2/SATAT 21
44 SRCT7/CR#_F
SRCC2/SATAC 22
43 SRCC7/CR#_E
GNDSRC 23
42 GNDSRC
SRCT3/CR#_C 24
41 SRCT6
SRCC3/CR#_D 25
40 SRCC6
VDDSRC_IO 26
39 VDDSRC
SRCT427
38PCI_STOP#/SRCT5
SRCC4 28
37 CPU_STOP#/SRCC5
GNDSRC 29
36 VDDSRC_IO
SRCT9 30
35 SRCC10
SRCC9 31
34 SRCT10
SRCC11/CR#_G 32
33 SRCT11/CR#_H
9
L
PR
S5
0
1
FSLC
2
B0b7
FSLB
1
B0b6
FSLA
1
B0b5
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
USB
MHz
DOT
MHz
0
266.66
0
1
133.33
0
1
0
200.00
0
1
166.66
1
0
333.33
1
0
1
100.00
1
0
400.00
11
1
1. FS
LA and FSLB are low-threshold inputs .Please s ee VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS
LC is a three-level input. Please s ee the VIL_FS and VIH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
96.00
Reserved
100.00
33.33
14.318
48.00
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9LPRS501SKLFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9LPRS501YGLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR |
| 9LPRS501YKLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR |
| 9LPRS502HGLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS502HGLF LOGIC AND TIMING MISC - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS502HGLF Logic and Timing Misc |
| 9LPRS502PGLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS502PGLF PHASED LOCKED LOOP (PLL) - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS502PGLF Phased Locked Loop (PLL) |
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