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参数资料
| 型号： | 9LRS3187BKLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC32 |
| 封装： | ROHS COMPLIANT, PLASTIC, MLF-32 |
| 文件页数： | 17/20页 |
| 文件大小： | 193K |
| 代理商： | 9LRS3187BKLFT |
IDT Programmable Timing Control Hub for Intel Based Systems
1602E—04/29/11
ICS9LRS3187B
Programmable Timing Control Hub for Intel Based Systems
6
Datasheet
General SMBus serial interface information for the ICS9LRS3187B
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D2
(H)
IDT clock will
acknowledge
Controller (host) sends the beginning byte location = N
IDT clock will
acknowledge
Controller (host) sends the data byte count = X
IDT clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
IDT clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D2
(H)
IDT clock will
acknowledge
Controller (host) sends the begining byte
location = N
IDT clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D3
(H)
IDT clock will
acknowledge
IDT clock will send the data byte count = X
IDT clock sends
Byte N + X -1
IDT clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
IDT (Sla ve /Re ce ive r)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
B eginning Byte N
stoP bit
X
Byt
e
Index Block Write Operation
S lave Address D2(H)
B eginning Byte = N
WRite
starT bit
Controlle r (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning B yte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
IDT (Sla ve /Re ce ive r)
Controlle r (Host)
X
By
te
ACK
Data Byte Count = X
ACK
S lave Address D3(H)
Index Block Read Operation
S lave Address D2(H)
B eginning Byte = N
ACK
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