参数资料
型号: A1244LUA-I1-T
厂商: Allegro Microsystems Inc
文件页数: 8/12页
文件大小: 253K
描述: IC HALL EFFECT LATCH SIP-3
标准包装: 4,000
传感范围: 80G 跳闸,-80G 释放
类型: 双极卡锁
电源电压: 3 V ~ 24 V
电流 - 电源: 6.9mA
输出类型: 数字
特点: 高速度
工作温度: -40°C ~ 150°C
封装/外壳: 3-SSIP
供应商设备封装: 3-SIP
包装: 散装
其它名称: 620-1425
Figure 2. Typical application circuits
GND
A1244
VCC
V+
0.01 糉
ECU
R
SENSE
C
BYP
GND
A1244
VCC
V+
0.01 糉
R
SENSE
C
BYP
(A) Low side sensing
(B) High side sensing
Amp
Regulator
Clock/Logic
Hall Element
Low-Pass
Filter
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
patented Allegro technique, namely Dynamic Quadrature Offset
Cancellation, removes key sources of the output drift induced by
thermal and mechanical stresses. This offset reduction technique
is based on a signal modulation-demodulation process. The
undesired offset signal is separated from the magnetic field-
induced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
its original spectrum at base band, while the DC offset becomes
a high-frequency signal. The magnetic-sourced signal then can
pass through a low-pass filter, while the modulated DC offset is
suppressed. The chopper stabilization technique uses a 350 kHz
high frequency clock. For demodulation process, a sample and
hold technique is used, where the sampling is performed at twice
the chopper frequency. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall out-
put voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
and-hold circuits.
Figure 3. Chopper stabilization circuit (Dynamic Quadrature Offset Cancellation)
Chopper-Stabilized, Two Wire
Hall-Effect Latch
A1244
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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