参数资料
| 型号： | A1440A-1VQG100C |
| 厂商： | Microsemi SoC |
| 文件页数： | 6/90页 |
| 文件大小： | 0K |
| 描述： | IC FPGA 4K GATES 100-VQFP |
| 产品变化通告： | A1440A Family Discontinuation 24/Jan/2012 |
| 标准包装： | 90 |
| 系列： | ACT™ 3 |
| LAB/CLB数： | 564 |
| 输入/输出数： | 83 |
| 门数： | 4000 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 100-TQFP |
| 供应商设备封装： | 100-VQFP（14x14） |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页
Detailed Specifications
2- 6
R e v ision 3
Horizontal Routing
Horizontal channels are located between the rows of modules and are composed of several routing
tracks. The horizontal routing tracks within the channel are divided into one or more segments. The
minimum horizontal segment length is the width of a module-pair, and the maximum horizontal segment
length is the full length of the channel. Any segment that spans more than one-third the row length is
considered a long horizontal segment. A typical channel is shown in Figure 2-7. Undedicated horizontal
routing tracks are used to route signal nets. Dedicated routing tracks are used for the global clock
networks and for power and ground tie-off tracks.
Vertical Routing
Other tracks run vertically through the modules. Vertical tracks are of three types: input, output, and long.
Vertical tracks are also divided into one or more segments. Each segment in an input track is dedicated
to the input of a particular module. Each segment in an output track is dedicated to the output of a
particular module. Long segments are uncommitted and can be assigned during routing. Each output
segment spans four channels (two above and two below), except near the top and bottom of the array
where edge effects occur. LVTs contain either one or two segments. An example of vertical routing tracks
and segments is shown in Figure 2-8.
Figure 2-7
Horizontal Routing Tracks and Segments
Figure 2-8
Vertical Routing Tracks and Segments
HF
Module Row
HCLK
CLK0
NVCC
SIGNAL
(LHT)
SIGNAL
NVSS
CLK1
Track
Segment
|
Module Row
Vertical Input
Segment
S-Module
C-Module
VF
FF
XF
Module Row
Channel
LVTs
S-Module
C-Module
相关PDF资料 |
PDF描述 |
|---|---|
| ASC65DRTS | CONN EDGECARD 130PS .100 DIP SLD |
| ASC65DRES | CONN EDGECARD 130POS .100 EYELET |
| A1225A-PQG100I | IC FPGA 2500 GATES 100-PQFP IND |
| AMC36DRYS | CONN EDGECARD 72POS .100 DIP SLD |
| ACB106DHNT-S621 | CONN EDGECARD 212PS .050 DIP SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A1440A-1VQG100I | 功能描述:IC FPGA 4K GATES 100-VQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ACT™ 3 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
| A1440A-2PG175C | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA) |
| A1440A-2PL84C | 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 4K GATES 564 CELLS 200MHZ 0.8UM 5V 84PLCC - Rail/Tube 制造商:Microsemi SOC Products Group 功能描述:FPGA ACT 3 4K GATES 564 CELLS 200MHZ 0.8UM 5V 84PLCC - Rail/Tube |
| A1440A-2PL84I | 制造商:Microsemi SOC Products Group 功能描述:FPGA ACT 3 4K GATES 564 CELLS 200MHZ 0.8UM 5V 84PLCC - Rail/Tube |
| A1440A-2PLG84C | 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 4K GATES 564 CELLS 200MHZ 0.8UM 5V 84PLCC - Rail/Tube 制造商:Microsemi SOC Products Group 功能描述:FPGA ACT 3 4K GATES 564 CELLS 200MHZ 0.8UM 5V 84PLCC - Rail/Tube |
发布紧急采购，3分钟左右您将得到回复。