参数资料
型号: A1440A-PQG160C
厂商: Microsemi SoC
文件页数: 6/90页
文件大小: 0K
描述: IC FPGA 4K GATES 160-PQFP
产品变化通告: A1440A Family Discontinuation 24/Jan/2012
标准包装: 24
系列: ACT™ 3
LAB/CLB数: 564
输入/输出数: 131
门数: 4000
电源电压: 4.5 V ~ 5.5 V
安装类型: 表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 160-BQFP
供应商设备封装: 160-PQFP(28x28)
Detailed Specifications
2- 6
R e v ision 3
Horizontal Routing
Horizontal channels are located between the rows of modules and are composed of several routing
tracks. The horizontal routing tracks within the channel are divided into one or more segments. The
minimum horizontal segment length is the width of a module-pair, and the maximum horizontal segment
length is the full length of the channel. Any segment that spans more than one-third the row length is
considered a long horizontal segment. A typical channel is shown in Figure 2-7. Undedicated horizontal
routing tracks are used to route signal nets. Dedicated routing tracks are used for the global clock
networks and for power and ground tie-off tracks.
Vertical Routing
Other tracks run vertically through the modules. Vertical tracks are of three types: input, output, and long.
Vertical tracks are also divided into one or more segments. Each segment in an input track is dedicated
to the input of a particular module. Each segment in an output track is dedicated to the output of a
particular module. Long segments are uncommitted and can be assigned during routing. Each output
segment spans four channels (two above and two below), except near the top and bottom of the array
where edge effects occur. LVTs contain either one or two segments. An example of vertical routing tracks
and segments is shown in Figure 2-8.
Figure 2-7
Horizontal Routing Tracks and Segments
Figure 2-8
Vertical Routing Tracks and Segments
HF
Module Row
HCLK
CLK0
NVCC
SIGNAL
(LHT)
SIGNAL
NVSS
CLK1
Track
Segment
|
Module Row
Vertical Input
Segment
S-Module
C-Module
VF
FF
XF
Module Row
Channel
LVTs
S-Module
C-Module
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